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2684ac05a8
This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX power domains and interacts with the GPC power controller to provide the peripherals in the power domain access to the NoC and ensures that those peripherals are properly reset when their respective power domain is brought back to life. Software needs to do different things to make the bus handshake happen after the GPC *MIX domain is powered up and before it is powered down. As the requirements are quite different between the various blk-ctrls there is a callback function provided to hook in the proper sequence. The peripheral domains are quite uniform, they handle the soft clock enables and resets in the blk-ctrl address space and sequencing with the upstream GPC power domains. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
8 lines
270 B
Makefile
8 lines
270 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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ifeq ($(CONFIG_ARM),y)
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obj-$(CONFIG_ARCH_MXC) += soc-imx.o
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endif
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obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
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obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
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obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
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obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
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