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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
55 lines
1.9 KiB
C
55 lines
1.9 KiB
C
/* gdb-io.h: FR403 GDB I/O port defs
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*
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* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _GDB_IO_H
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#define _GDB_IO_H
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#include <asm/serial-regs.h>
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#undef UART_RX
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#undef UART_TX
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#undef UART_DLL
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#undef UART_DLM
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#undef UART_IER
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#undef UART_IIR
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#undef UART_FCR
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#undef UART_LCR
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#undef UART_MCR
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#undef UART_LSR
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#undef UART_MSR
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#undef UART_SCR
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#define UART_RX 0*8 /* In: Receive buffer (DLAB=0) */
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#define UART_TX 0*8 /* Out: Transmit buffer (DLAB=0) */
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#define UART_DLL 0*8 /* Out: Divisor Latch Low (DLAB=1) */
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#define UART_DLM 1*8 /* Out: Divisor Latch High (DLAB=1) */
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#define UART_IER 1*8 /* Out: Interrupt Enable Register */
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#define UART_IIR 2*8 /* In: Interrupt ID Register */
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#define UART_FCR 2*8 /* Out: FIFO Control Register */
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#define UART_LCR 3*8 /* Out: Line Control Register */
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#define UART_MCR 4*8 /* Out: Modem Control Register */
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#define UART_LSR 5*8 /* In: Line Status Register */
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#define UART_MSR 6*8 /* In: Modem Status Register */
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#define UART_SCR 7*8 /* I/O: Scratch Register */
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#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
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#define UART_LCR_SBC 0x40 /* Set break control */
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#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
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#define UART_LCR_EPAR 0x10 /* Even parity select */
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#define UART_LCR_PARITY 0x08 /* Parity Enable */
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#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
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#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */
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#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */
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#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
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#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
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#endif /* _GDB_IO_H */
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