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420b946977
Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead of PCI to which Nouveau is tightly dependent. This patch allows Nouveau to handle platform devices by: - abstracting PCI-dependent functions that were typically used for resource querying and page mapping, - introducing a nv_device_is_pci() function that allows to make PCI-dependent code conditional, - providing a nouveau_drm_platform_probe() function that takes a GPU platform device to be probed. Core code as well as engine/subdev drivers are updated wherever possible to make use of these functions. Some older drivers are too dependent on PCI to be properly updated, but all newer code on which future chips may depend should at least be runnable with platform devices. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
198 lines
4.6 KiB
C
198 lines
4.6 KiB
C
#include <linux/module.h>
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#include <core/device.h>
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#include "nouveau_drm.h"
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#include "nouveau_agp.h"
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#include "nouveau_reg.h"
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#if __OS_HAS_AGP
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MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
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static int nouveau_agpmode = -1;
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module_param_named(agpmode, nouveau_agpmode, int, 0400);
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struct nouveau_agpmode_quirk {
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u16 hostbridge_vendor;
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u16 hostbridge_device;
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u16 chip_vendor;
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u16 chip_device;
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int mode;
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};
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static struct nouveau_agpmode_quirk nouveau_agpmode_quirk_list[] = {
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/* VIA Apollo PRO133x / GeForce FX 5600 Ultra, max agpmode 2, fdo #20341 */
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{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 },
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{},
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};
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static unsigned long
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get_agp_mode(struct nouveau_drm *drm, const struct drm_agp_info *info)
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{
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struct nouveau_device *device = nv_device(drm->device);
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struct nouveau_agpmode_quirk *quirk = nouveau_agpmode_quirk_list;
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int agpmode = nouveau_agpmode;
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unsigned long mode = info->mode;
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/*
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* FW seems to be broken on nv18, it makes the card lock up
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* randomly.
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*/
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if (device->chipset == 0x18)
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mode &= ~PCI_AGP_COMMAND_FW;
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/*
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* Go through the quirks list and adjust the agpmode accordingly.
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*/
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while (agpmode == -1 && quirk->hostbridge_vendor) {
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if (info->id_vendor == quirk->hostbridge_vendor &&
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info->id_device == quirk->hostbridge_device &&
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device->pdev->vendor == quirk->chip_vendor &&
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device->pdev->device == quirk->chip_device) {
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agpmode = quirk->mode;
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nv_info(device, "Forcing agp mode to %dX. Use agpmode to override.\n",
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agpmode);
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break;
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}
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++quirk;
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}
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/*
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* AGP mode set in the command line.
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*/
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if (agpmode > 0) {
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bool agpv3 = mode & 0x8;
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int rate = agpv3 ? agpmode / 4 : agpmode;
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mode = (mode & ~0x7) | (rate & 0x7);
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}
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return mode;
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}
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static bool
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nouveau_agp_enabled(struct nouveau_drm *drm)
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{
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struct drm_device *dev = drm->dev;
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if (!dev->pdev || !drm_pci_device_is_agp(dev) || !dev->agp)
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return false;
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if (drm->agp.stat == UNKNOWN) {
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if (!nouveau_agpmode)
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return false;
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#ifdef __powerpc__
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/* Disable AGP by default on all PowerPC machines for
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* now -- At least some UniNorth-2 AGP bridges are
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* known to be broken: DMA from the host to the card
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* works just fine, but writeback from the card to the
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* host goes straight to memory untranslated bypassing
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* the GATT somehow, making them quite painful to deal
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* with...
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*/
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if (nouveau_agpmode == -1)
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return false;
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#endif
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return true;
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}
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return (drm->agp.stat == ENABLED);
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}
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#endif
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void
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nouveau_agp_reset(struct nouveau_drm *drm)
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{
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#if __OS_HAS_AGP
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struct nouveau_device *device = nv_device(drm->device);
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struct drm_device *dev = drm->dev;
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u32 save[2];
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int ret;
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if (!nouveau_agp_enabled(drm))
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return;
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/* First of all, disable fast writes, otherwise if it's
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* already enabled in the AGP bridge and we disable the card's
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* AGP controller we might be locking ourselves out of it. */
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if ((nv_rd32(device, NV04_PBUS_PCI_NV_19) |
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dev->agp->mode) & PCI_AGP_COMMAND_FW) {
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struct drm_agp_info info;
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struct drm_agp_mode mode;
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ret = drm_agp_info(dev, &info);
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if (ret)
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return;
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mode.mode = get_agp_mode(drm, &info);
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mode.mode &= ~PCI_AGP_COMMAND_FW;
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ret = drm_agp_enable(dev, mode);
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if (ret)
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return;
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}
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/* clear busmaster bit, and disable AGP */
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save[0] = nv_mask(device, NV04_PBUS_PCI_NV_1, 0x00000004, 0x00000000);
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nv_wr32(device, NV04_PBUS_PCI_NV_19, 0);
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/* reset PGRAPH, PFIFO and PTIMER */
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save[1] = nv_mask(device, 0x000200, 0x00011100, 0x00000000);
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nv_mask(device, 0x000200, 0x00011100, save[1]);
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/* and restore bustmaster bit (gives effect of resetting AGP) */
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nv_wr32(device, NV04_PBUS_PCI_NV_1, save[0]);
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#endif
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}
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void
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nouveau_agp_init(struct nouveau_drm *drm)
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{
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#if __OS_HAS_AGP
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struct nouveau_device *device = nv_device(drm->device);
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struct drm_device *dev = drm->dev;
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struct drm_agp_info info;
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struct drm_agp_mode mode;
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int ret;
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if (!nouveau_agp_enabled(drm))
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return;
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drm->agp.stat = DISABLE;
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ret = drm_agp_acquire(dev);
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if (ret) {
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nv_error(device, "unable to acquire AGP: %d\n", ret);
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return;
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}
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ret = drm_agp_info(dev, &info);
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if (ret) {
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nv_error(device, "unable to get AGP info: %d\n", ret);
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return;
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}
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/* see agp.h for the AGPSTAT_* modes available */
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mode.mode = get_agp_mode(drm, &info);
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ret = drm_agp_enable(dev, mode);
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if (ret) {
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nv_error(device, "unable to enable AGP: %d\n", ret);
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return;
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}
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drm->agp.stat = ENABLED;
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drm->agp.base = info.aperture_base;
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drm->agp.size = info.aperture_size;
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#endif
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}
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void
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nouveau_agp_fini(struct nouveau_drm *drm)
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{
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#if __OS_HAS_AGP
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struct drm_device *dev = drm->dev;
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if (dev->agp && dev->agp->acquired)
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drm_agp_release(dev);
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#endif
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}
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