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The mailbox hardware (in OMAP) uses a queued mailbox interrupt mechanism that provides a communication channel between processors through a set of registers and their associated interrupt signals by sending and receiving messages. The OMAP mailbox framework/driver code is moved to be under drivers/mailbox, in preparation for adapting to a common mailbox driver framework. This allows the build for OMAP mailbox to be enabled (it was disabled during the multi-platform support). As part of the migration from plat and mach code: - Kconfig symbols have been renamed to build OMAP1 or OMAP2+ drivers. - mailbox.h under plat-omap/plat/include has been split into a public and private header files. The public header has only the API related functions and types. - The module name mailbox.ko from plat-omap is changed to omap-mailbox.ko - The module name mailbox_mach.ko from mach-omapX is changed as mailbox_omap1.ko for OMAP1 mailbox_omap2.ko for OMAP2+ Cc: Tony Lindgren <tony@atomide.com> [gregkh@linuxfoundation.org: ack for staging part] Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Omar Ramirez Luna <omar.ramirez@copitl.com> Signed-off-by: Suman Anna <s-anna@ti.com>
203 lines
4.3 KiB
C
203 lines
4.3 KiB
C
/*
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* Mailbox reservation modules for OMAP1
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*
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* Copyright (C) 2006-2009 Nokia Corporation
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* Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include "omap-mbox.h"
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#define MAILBOX_ARM2DSP1 0x00
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#define MAILBOX_ARM2DSP1b 0x04
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#define MAILBOX_DSP2ARM1 0x08
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#define MAILBOX_DSP2ARM1b 0x0c
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#define MAILBOX_DSP2ARM2 0x10
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#define MAILBOX_DSP2ARM2b 0x14
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#define MAILBOX_ARM2DSP1_Flag 0x18
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#define MAILBOX_DSP2ARM1_Flag 0x1c
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#define MAILBOX_DSP2ARM2_Flag 0x20
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static void __iomem *mbox_base;
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struct omap_mbox1_fifo {
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unsigned long cmd;
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unsigned long data;
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unsigned long flag;
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};
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struct omap_mbox1_priv {
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struct omap_mbox1_fifo tx_fifo;
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struct omap_mbox1_fifo rx_fifo;
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};
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static inline int mbox_read_reg(size_t ofs)
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{
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return __raw_readw(mbox_base + ofs);
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}
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static inline void mbox_write_reg(u32 val, size_t ofs)
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{
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__raw_writew(val, mbox_base + ofs);
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}
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/* msg */
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static mbox_msg_t omap1_mbox_fifo_read(struct omap_mbox *mbox)
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{
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struct omap_mbox1_fifo *fifo =
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&((struct omap_mbox1_priv *)mbox->priv)->rx_fifo;
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mbox_msg_t msg;
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msg = mbox_read_reg(fifo->data);
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msg |= ((mbox_msg_t) mbox_read_reg(fifo->cmd)) << 16;
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return msg;
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}
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static void
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omap1_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
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{
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struct omap_mbox1_fifo *fifo =
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&((struct omap_mbox1_priv *)mbox->priv)->tx_fifo;
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mbox_write_reg(msg & 0xffff, fifo->data);
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mbox_write_reg(msg >> 16, fifo->cmd);
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}
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static int omap1_mbox_fifo_empty(struct omap_mbox *mbox)
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{
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return 0;
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}
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static int omap1_mbox_fifo_full(struct omap_mbox *mbox)
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{
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struct omap_mbox1_fifo *fifo =
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&((struct omap_mbox1_priv *)mbox->priv)->rx_fifo;
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return mbox_read_reg(fifo->flag);
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}
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/* irq */
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static void
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omap1_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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if (irq == IRQ_RX)
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enable_irq(mbox->irq);
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}
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static void
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omap1_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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if (irq == IRQ_RX)
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disable_irq(mbox->irq);
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}
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static int
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omap1_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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if (irq == IRQ_TX)
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return 0;
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return 1;
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}
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static struct omap_mbox_ops omap1_mbox_ops = {
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.type = OMAP_MBOX_TYPE1,
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.fifo_read = omap1_mbox_fifo_read,
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.fifo_write = omap1_mbox_fifo_write,
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.fifo_empty = omap1_mbox_fifo_empty,
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.fifo_full = omap1_mbox_fifo_full,
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.enable_irq = omap1_mbox_enable_irq,
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.disable_irq = omap1_mbox_disable_irq,
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.is_irq = omap1_mbox_is_irq,
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};
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/* FIXME: the following struct should be created automatically by the user id */
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/* DSP */
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static struct omap_mbox1_priv omap1_mbox_dsp_priv = {
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.tx_fifo = {
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.cmd = MAILBOX_ARM2DSP1b,
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.data = MAILBOX_ARM2DSP1,
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.flag = MAILBOX_ARM2DSP1_Flag,
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},
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.rx_fifo = {
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.cmd = MAILBOX_DSP2ARM1b,
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.data = MAILBOX_DSP2ARM1,
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.flag = MAILBOX_DSP2ARM1_Flag,
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},
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};
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static struct omap_mbox mbox_dsp_info = {
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.name = "dsp",
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.ops = &omap1_mbox_ops,
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.priv = &omap1_mbox_dsp_priv,
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};
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static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL };
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static int omap1_mbox_probe(struct platform_device *pdev)
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{
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struct resource *mem;
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int ret;
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struct omap_mbox **list;
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list = omap1_mboxes;
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list[0]->irq = platform_get_irq_byname(pdev, "dsp");
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem)
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return -ENOENT;
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mbox_base = ioremap(mem->start, resource_size(mem));
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if (!mbox_base)
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return -ENOMEM;
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ret = omap_mbox_register(&pdev->dev, list);
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if (ret) {
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iounmap(mbox_base);
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return ret;
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}
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return 0;
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}
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static int omap1_mbox_remove(struct platform_device *pdev)
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{
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omap_mbox_unregister();
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iounmap(mbox_base);
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return 0;
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}
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static struct platform_driver omap1_mbox_driver = {
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.probe = omap1_mbox_probe,
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.remove = omap1_mbox_remove,
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.driver = {
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.name = "omap-mailbox",
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},
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};
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static int __init omap1_mbox_init(void)
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{
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return platform_driver_register(&omap1_mbox_driver);
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}
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static void __exit omap1_mbox_exit(void)
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{
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platform_driver_unregister(&omap1_mbox_driver);
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}
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module_init(omap1_mbox_init);
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module_exit(omap1_mbox_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions");
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MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
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MODULE_ALIAS("platform:omap1-mailbox");
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