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d82a7aed83
Add a Device Feature List (DFL) feature id [1] for the configurable IOPLL user clock source, which can be used to configure the clock speeds that are used for RTL logic that is programmed into the Partial Reconfiguration (PR) region of an FPGA. The IOPLL user-space driver [2] contains frequency tables [3] with the specific user clock frequencies for an implementation. For each desired frequency, the table values are produced by calling the quartus tool, the same tool that generates the IOPLL RTL logic. The quartus tool allows the RTL designer to select different options which can affect the table values. The table-driven, user-space driver allows for supporting future, modified implementations and provides users the ability to modify the IOPLL implementation. [1] https://github.com/OPAE/dfl-feature-id [2]a494f54a9f/libraries/plugins/xfpga/usrclk/fpga_user_clk.c[3]a494f54a9f/libraries/plugins/xfpga/usrclk/fpga_user_clk_freq.hAcked-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Peter Colberg <peter.colberg@intel.com> Link: https://lore.kernel.org/r/20220831204851.4683-1-peter.colberg@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
70 lines
1.7 KiB
C
70 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Generic DFL driver for Userspace I/O devicess
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*
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* Copyright (C) 2021 Intel Corporation, Inc.
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*/
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#include <linux/dfl.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/uio_driver.h>
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#define DRIVER_NAME "uio_dfl"
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static int uio_dfl_probe(struct dfl_device *ddev)
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{
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struct resource *r = &ddev->mmio_res;
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struct device *dev = &ddev->dev;
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struct uio_info *uioinfo;
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struct uio_mem *uiomem;
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int ret;
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uioinfo = devm_kzalloc(dev, sizeof(struct uio_info), GFP_KERNEL);
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if (!uioinfo)
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return -ENOMEM;
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uioinfo->name = DRIVER_NAME;
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uioinfo->version = "0";
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uiomem = &uioinfo->mem[0];
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uiomem->memtype = UIO_MEM_PHYS;
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uiomem->addr = r->start & PAGE_MASK;
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uiomem->offs = r->start & ~PAGE_MASK;
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uiomem->size = (uiomem->offs + resource_size(r)
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+ PAGE_SIZE - 1) & PAGE_MASK;
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uiomem->name = r->name;
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/* Irq is yet to be supported */
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uioinfo->irq = UIO_IRQ_NONE;
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ret = devm_uio_register_device(dev, uioinfo);
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if (ret)
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dev_err(dev, "unable to register uio device\n");
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return ret;
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}
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#define FME_FEATURE_ID_ETH_GROUP 0x10
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#define FME_FEATURE_ID_HSSI_SUBSYS 0x15
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#define PORT_FEATURE_ID_IOPLL_USRCLK 0x14
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static const struct dfl_device_id uio_dfl_ids[] = {
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{ FME_ID, FME_FEATURE_ID_ETH_GROUP },
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{ FME_ID, FME_FEATURE_ID_HSSI_SUBSYS },
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{ PORT_ID, PORT_FEATURE_ID_IOPLL_USRCLK },
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{ }
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};
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MODULE_DEVICE_TABLE(dfl, uio_dfl_ids);
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static struct dfl_driver uio_dfl_driver = {
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.drv = {
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.name = DRIVER_NAME,
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},
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.id_table = uio_dfl_ids,
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.probe = uio_dfl_probe,
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};
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module_dfl_driver(uio_dfl_driver);
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MODULE_DESCRIPTION("Generic DFL driver for Userspace I/O devices");
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MODULE_AUTHOR("Intel Corporation");
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MODULE_LICENSE("GPL v2");
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