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2f86dc4cdd
Add support of Hardware Managed Performance States (HWP) described in Volume 3 section 14.4 of the SDM. With HWP enbaled intel_pstate will no longer be responsible for selecting P states for the processor. intel_pstate will continue to register to the cpufreq core as the scaling driver for CPUs implementing HWP. In HWP mode intel_pstate provides three functions reporting frequency to the cpufreq core, support for the set_policy() interface from the core and maintaining the intel_pstate sysfs interface in /sys/devices/system/cpu/intel_pstate. User preferences expressed via the set_policy() interface or the sysfs interface are forwared to the CPU via the HWP MSR interface. Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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| .. | ||
| a.out.h | ||
| auxvec.h | ||
| bitsperlong.h | ||
| boot.h | ||
| bootparam.h | ||
| byteorder.h | ||
| debugreg.h | ||
| e820.h | ||
| errno.h | ||
| fcntl.h | ||
| hw_breakpoint.h | ||
| hyperv.h | ||
| ioctl.h | ||
| ioctls.h | ||
| ipcbuf.h | ||
| ist.h | ||
| Kbuild | ||
| kvm.h | ||
| kvm_para.h | ||
| kvm_perf.h | ||
| ldt.h | ||
| mce.h | ||
| mman.h | ||
| msgbuf.h | ||
| msr-index.h | ||
| msr.h | ||
| mtrr.h | ||
| param.h | ||
| perf_regs.h | ||
| poll.h | ||
| posix_types.h | ||
| posix_types_32.h | ||
| posix_types_64.h | ||
| posix_types_x32.h | ||
| prctl.h | ||
| processor-flags.h | ||
| ptrace-abi.h | ||
| ptrace.h | ||
| resource.h | ||
| sembuf.h | ||
| setup.h | ||
| shmbuf.h | ||
| sigcontext.h | ||
| sigcontext32.h | ||
| siginfo.h | ||
| signal.h | ||
| socket.h | ||
| sockios.h | ||
| stat.h | ||
| statfs.h | ||
| svm.h | ||
| swab.h | ||
| termbits.h | ||
| termios.h | ||
| types.h | ||
| ucontext.h | ||
| unistd.h | ||
| vm86.h | ||
| vmx.h | ||
| vsyscall.h | ||