Kelvin Cheung 2fa36399e6 MIPS: Add CPU support for Loongson1B ... Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2012-07-23 13:57:04 +01:00
..
backtrace.c	MIPS: oprofile: Add callgraph support	2011-06-15 14:35:34 +02:00
common.c	MIPS: Add CPU support for Loongson1B	2012-07-23 13:57:04 +01:00
Makefile	MIPS: Remove all -Wall and almost all -Werror usage from arch/mips.	2012-05-21 15:09:36 +01:00
op_impl.h	MIPS: oprofile: Add callgraph support	2011-06-15 14:35:34 +02:00
op_model_loongson2.c	MIPS: Oprofile: Fixup of loongson2_exit()	2010-07-05 17:17:31 +01:00
op_model_mipsxx.c	MIPS: Add CPU support for Loongson1B	2012-07-23 13:57:04 +01:00
op_model_rm9000.c	oprofile: more whitespace fixes	2008-10-15 20:55:51 +02:00