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30ab1e7886
Currently register read-back for the ad193x is broken, because it expects bit 0 of the upper byte to be set to indicate a read operation, while the regmap default for SPI is to use bit 7. This patch also addresses another oddity of the device. There are SPI and I2C versions of this codec. In both cases the registers are 8-bit wide and numbered from 0x0 to 0x10, but in the SPI case there is also a so called 'global address' which is prefixed in-front of the register address. The global address mimics I2C behaviour and includes a static device address the and the read/write flag. This basically extends the register address to an 16-bit value numbered from 0x800 to 0x810. These are the register numbers which are currently used by the driver. This works, because I2C will ignore the upper 8 bits of the register, but it is still a bit confusing, as there are no such register numbers in the I2C case. The approach taken by this patch is to number the registers from 0x00 to 0x10 and encode the global address for SPI mode into the read and write flag masks. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> |
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atmel | ||
au1x | ||
blackfin | ||
codecs | ||
davinci | ||
ep93xx | ||
fsl | ||
imx | ||
jz4740 | ||
kirkwood | ||
mid-x86 | ||
mxs | ||
nuc900 | ||
omap | ||
pxa | ||
s6000 | ||
samsung | ||
sh | ||
tegra | ||
txx9 | ||
Kconfig | ||
Makefile | ||
soc-cache.c | ||
soc-core.c | ||
soc-dapm.c | ||
soc-io.c | ||
soc-jack.c | ||
soc-pcm.c | ||
soc-utils.c |