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46062a1c0a
[ Upstream commitd73b1d02de] If the hangcheck timer expires, check if the fw's position in the cmdstream has advanced (changed) since last timer expiration, and allow it up to three additional "extensions" to it's alotted time. The intention is to continue to catch "shader stuck in a loop" type hangs quickly, but allow more time for things that are actually making forward progress. Because we need to sample the CP state twice to detect if there has not been progress, this also cuts the the timer's duration in half. v2: Fix typo (REG_A6XX_CP_CSQ_IB2_STAT), add comment v3: Only halve hangcheck timer duration for generations which support progress detection (hdanton); removed unused a5xx progress (without knowing how to adjust for data buffered in ROQ it is too likely to report a false negative) v4: Comment updates to better describe the total hangcheck duration when progress detection is applied Reviewed-by: Chia-I Wu <olvaffe@gmail.com> Tested-by: Chia-I Wu <olvaffe@gmail.com> # dEQP-GLES2.functional.flush_finish.wait Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/511584/ Link: https://lore.kernel.org/r/20221114193049.1533391-3-robdclark@gmail.com Stable-dep-of:ca090c837b("drm/msm: fix missing wq allocation error handling") Signed-off-by: Sasha Levin <sashal@kernel.org>
120 lines
3.2 KiB
C
120 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#ifndef __MSM_RINGBUFFER_H__
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#define __MSM_RINGBUFFER_H__
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#include "drm/gpu_scheduler.h"
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#include "msm_drv.h"
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#define rbmemptr(ring, member) \
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((ring)->memptrs_iova + offsetof(struct msm_rbmemptrs, member))
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#define rbmemptr_stats(ring, index, member) \
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(rbmemptr((ring), stats) + \
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((index) * sizeof(struct msm_gpu_submit_stats)) + \
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offsetof(struct msm_gpu_submit_stats, member))
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struct msm_gpu_submit_stats {
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u64 cpcycles_start;
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u64 cpcycles_end;
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u64 alwayson_start;
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u64 alwayson_end;
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};
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#define MSM_GPU_SUBMIT_STATS_COUNT 64
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struct msm_rbmemptrs {
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volatile uint32_t rptr;
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volatile uint32_t fence;
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volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT];
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volatile u64 ttbr0;
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};
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struct msm_cp_state {
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uint64_t ib1_base, ib2_base;
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uint32_t ib1_rem, ib2_rem;
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};
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struct msm_ringbuffer {
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struct msm_gpu *gpu;
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int id;
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struct drm_gem_object *bo;
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uint32_t *start, *end, *cur, *next;
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/*
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* The job scheduler for this ring.
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*/
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struct drm_gpu_scheduler sched;
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/*
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* List of in-flight submits on this ring. Protected by submit_lock.
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*
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* Currently just submits that are already written into the ring, not
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* submits that are still in drm_gpu_scheduler's queues. At a later
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* step we could probably move to letting drm_gpu_scheduler manage
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* hangcheck detection and keep track of submit jobs that are in-
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* flight.
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*/
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struct list_head submits;
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spinlock_t submit_lock;
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uint64_t iova;
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uint32_t hangcheck_fence;
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struct msm_rbmemptrs *memptrs;
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uint64_t memptrs_iova;
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struct msm_fence_context *fctx;
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/**
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* hangcheck_progress_retries:
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*
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* The number of extra hangcheck duration cycles that we have given
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* due to it appearing that the GPU is making forward progress.
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*
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* For GPU generations which support progress detection (see.
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* msm_gpu_funcs::progress()), if the GPU appears to be making progress
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* (ie. the CP has advanced in the command stream, we'll allow up to
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* DRM_MSM_HANGCHECK_PROGRESS_RETRIES expirations of the hangcheck timer
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* before killing the job. But to detect progress we need two sample
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* points, so the duration of the hangcheck timer is halved. In other
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* words we'll let the submit run for up to:
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*
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* (DRM_MSM_HANGCHECK_DEFAULT_PERIOD / 2) * (DRM_MSM_HANGCHECK_PROGRESS_RETRIES + 1)
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*/
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int hangcheck_progress_retries;
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/**
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* last_cp_state: The state of the CP at the last call to gpu->progress()
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*/
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struct msm_cp_state last_cp_state;
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/*
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* preempt_lock protects preemption and serializes wptr updates against
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* preemption. Can be aquired from irq context.
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*/
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spinlock_t preempt_lock;
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};
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struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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void *memptrs, uint64_t memptrs_iova);
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void msm_ringbuffer_destroy(struct msm_ringbuffer *ring);
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/* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */
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static inline void
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OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
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{
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/*
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* ring->next points to the current command being written - it won't be
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* committed as ring->cur until the flush
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*/
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if (ring->next == ring->end)
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ring->next = ring->start;
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*(ring->next++) = data;
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}
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#endif /* __MSM_RINGBUFFER_H__ */
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