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a28aad66da
The DT based and ACPI based platform drivers here do the same thing; map some memory and hand it over to the coreboot bus to populate devices. The only major difference is that the DT based driver doesn't map the coreboot table header to figure out how large of a region to map for the whole coreboot table and it uses of_iomap() instead of ioremap_cache(). A cached or non-cached mapping shouldn't matter here and mapping some smaller region first before mapping the whole table is just more work but should be OK. In the end, we can remove two files and combine the code all in one place making it easier to reason about things. We leave the old Kconfigs in place for a little while longer but make them hidden and select the previously hidden config option. This way users can upgrade without having to know to reselect this config in the future. Later on we can remove the old hidden configs. Cc: Wei-Ning Huang <wnhuang@chromium.org> Cc: Julius Werner <jwerner@chromium.org> Cc: Brian Norris <briannorris@chromium.org> Cc: Samuel Holland <samuel@sholland.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
94 lines
2.2 KiB
C
94 lines
2.2 KiB
C
/*
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* coreboot_table.h
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*
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* Internal header for coreboot table access.
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*
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* Copyright 2014 Gerd Hoffmann <kraxel@redhat.com>
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* Copyright 2017 Google Inc.
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* Copyright 2017 Samuel Holland <samuel@sholland.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License v2.0 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __COREBOOT_TABLE_H
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#define __COREBOOT_TABLE_H
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#include <linux/io.h>
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/* Coreboot table header structure */
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struct coreboot_table_header {
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char signature[4];
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u32 header_bytes;
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u32 header_checksum;
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u32 table_bytes;
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u32 table_checksum;
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u32 table_entries;
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};
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/* List of coreboot entry structures that is used */
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/* Generic */
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struct coreboot_table_entry {
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u32 tag;
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u32 size;
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};
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/* Points to a CBMEM entry */
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struct lb_cbmem_ref {
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u32 tag;
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u32 size;
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u64 cbmem_addr;
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};
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/* Describes framebuffer setup by coreboot */
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struct lb_framebuffer {
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u32 tag;
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u32 size;
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u64 physical_address;
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u32 x_resolution;
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u32 y_resolution;
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u32 bytes_per_line;
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u8 bits_per_pixel;
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u8 red_mask_pos;
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u8 red_mask_size;
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u8 green_mask_pos;
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u8 green_mask_size;
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u8 blue_mask_pos;
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u8 blue_mask_size;
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u8 reserved_mask_pos;
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u8 reserved_mask_size;
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};
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/* A device, additionally with information from coreboot. */
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struct coreboot_device {
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struct device dev;
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union {
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struct coreboot_table_entry entry;
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struct lb_cbmem_ref cbmem_ref;
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struct lb_framebuffer framebuffer;
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};
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};
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/* A driver for handling devices described in coreboot tables. */
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struct coreboot_driver {
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int (*probe)(struct coreboot_device *);
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int (*remove)(struct coreboot_device *);
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struct device_driver drv;
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u32 tag;
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};
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/* Register a driver that uses the data from a coreboot table. */
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int coreboot_driver_register(struct coreboot_driver *driver);
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/* Unregister a driver that uses the data from a coreboot table. */
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void coreboot_driver_unregister(struct coreboot_driver *driver);
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#endif /* __COREBOOT_TABLE_H */
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