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66cd0b4b0c
Add MT8186 imp i2c wrapper clock controllers which provide clock gate control in i2c IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-7-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
67 lines
2.2 KiB
C
67 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright (c) 2022 MediaTek Inc.
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// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include <dt-bindings/clock/mt8186-clk.h>
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#include "clk-gate.h"
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#include "clk-mtk.h"
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static const struct mtk_gate_regs imp_iic_wrap_cg_regs = {
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.set_ofs = 0xe08,
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.clr_ofs = 0xe04,
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.sta_ofs = 0xe00,
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};
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#define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
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static const struct mtk_gate imp_iic_wrap_clks[] = {
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C0,
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"imp_iic_wrap_ap_clock_i2c0", "infra_ao_i2c_ap", 0),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C1,
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"imp_iic_wrap_ap_clock_i2c1", "infra_ao_i2c_ap", 1),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C2,
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"imp_iic_wrap_ap_clock_i2c2", "infra_ao_i2c_ap", 2),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C3,
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"imp_iic_wrap_ap_clock_i2c3", "infra_ao_i2c_ap", 3),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C4,
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"imp_iic_wrap_ap_clock_i2c4", "infra_ao_i2c_ap", 4),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C5,
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"imp_iic_wrap_ap_clock_i2c5", "infra_ao_i2c_ap", 5),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C6,
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"imp_iic_wrap_ap_clock_i2c6", "infra_ao_i2c_ap", 6),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C7,
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"imp_iic_wrap_ap_clock_i2c7", "infra_ao_i2c_ap", 7),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C8,
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"imp_iic_wrap_ap_clock_i2c8", "infra_ao_i2c_ap", 8),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C9,
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"imp_iic_wrap_ap_clock_i2c9", "infra_ao_i2c_ap", 9),
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};
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static const struct mtk_clk_desc imp_iic_wrap_desc = {
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.clks = imp_iic_wrap_clks,
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.num_clks = ARRAY_SIZE(imp_iic_wrap_clks),
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};
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static const struct of_device_id of_match_clk_mt8186_imp_iic_wrap[] = {
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{
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.compatible = "mediatek,mt8186-imp_iic_wrap",
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.data = &imp_iic_wrap_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt8186_imp_iic_wrap_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt8186-imp_iic_wrap",
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.of_match_table = of_match_clk_mt8186_imp_iic_wrap,
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},
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};
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builtin_platform_driver(clk_mt8186_imp_iic_wrap_drv);
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