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cd3a77a085
Various small clock controllers only have clock gates, and utilize
mtk_clk_simple_probe() as their driver probe function.
Now that we have a matching remove function, hook it up for the relevant
drivers. This was done with the following command:
sed -i -e '/mtk_clk_simple_probe/a \
.remove = mtk_clk_simple_remove,' drivers/clk/mediatek/clk-mt8195-*.c
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220208124034.414635-29-wenst@chromium.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright (c) 2021 MediaTek Inc.
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// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
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#include "clk-gate.h"
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#include "clk-mtk.h"
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#include <dt-bindings/clock/mt8195-clk.h>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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static const struct mtk_gate_regs vdec0_cg_regs = {
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.set_ofs = 0x0,
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.clr_ofs = 0x4,
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.sta_ofs = 0x0,
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};
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static const struct mtk_gate_regs vdec1_cg_regs = {
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.set_ofs = 0x200,
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.clr_ofs = 0x204,
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.sta_ofs = 0x200,
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};
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static const struct mtk_gate_regs vdec2_cg_regs = {
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.set_ofs = 0x8,
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.clr_ofs = 0xc,
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.sta_ofs = 0x8,
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};
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#define GATE_VDEC0(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
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#define GATE_VDEC1(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
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#define GATE_VDEC2(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
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static const struct mtk_gate vdec_clks[] = {
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/* VDEC0 */
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GATE_VDEC0(CLK_VDEC_VDEC, "vdec_vdec", "top_vdec", 0),
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/* VDEC1 */
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GATE_VDEC1(CLK_VDEC_LAT, "vdec_lat", "top_vdec", 0),
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/* VDEC2 */
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GATE_VDEC2(CLK_VDEC_LARB1, "vdec_larb1", "top_vdec", 0),
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};
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static const struct mtk_gate vdec_core1_clks[] = {
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/* VDEC0 */
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GATE_VDEC0(CLK_VDEC_CORE1_VDEC, "vdec_core1_vdec", "top_vdec", 0),
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/* VDEC1 */
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GATE_VDEC1(CLK_VDEC_CORE1_LAT, "vdec_core1_lat", "top_vdec", 0),
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/* VDEC2 */
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GATE_VDEC2(CLK_VDEC_CORE1_LARB1, "vdec_core1_larb1", "top_vdec", 0),
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};
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static const struct mtk_gate vdec_soc_clks[] = {
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/* VDEC0 */
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GATE_VDEC0(CLK_VDEC_SOC_VDEC, "vdec_soc_vdec", "top_vdec", 0),
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/* VDEC1 */
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GATE_VDEC1(CLK_VDEC_SOC_LAT, "vdec_soc_lat", "top_vdec", 0),
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/* VDEC2 */
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GATE_VDEC2(CLK_VDEC_SOC_LARB1, "vdec_soc_larb1", "top_vdec", 0),
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};
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static const struct mtk_clk_desc vdec_desc = {
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.clks = vdec_clks,
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.num_clks = ARRAY_SIZE(vdec_clks),
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};
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static const struct mtk_clk_desc vdec_core1_desc = {
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.clks = vdec_core1_clks,
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.num_clks = ARRAY_SIZE(vdec_core1_clks),
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};
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static const struct mtk_clk_desc vdec_soc_desc = {
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.clks = vdec_soc_clks,
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.num_clks = ARRAY_SIZE(vdec_soc_clks),
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};
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static const struct of_device_id of_match_clk_mt8195_vdec[] = {
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{
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.compatible = "mediatek,mt8195-vdecsys",
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.data = &vdec_desc,
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}, {
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.compatible = "mediatek,mt8195-vdecsys_core1",
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.data = &vdec_core1_desc,
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}, {
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.compatible = "mediatek,mt8195-vdecsys_soc",
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.data = &vdec_soc_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt8195_vdec_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt8195-vdec",
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.of_match_table = of_match_clk_mt8195_vdec,
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},
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};
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builtin_platform_driver(clk_mt8195_vdec_drv);
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