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![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
138 lines
2.9 KiB
C
138 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include "clk.h"
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/**
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* struct clk_frac - mxs fractional divider clock
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* @hw: clk_hw for the fractional divider clock
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* @reg: register address
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* @shift: the divider bit shift
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* @width: the divider bit width
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* @busy: busy bit shift
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*
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* The clock is an adjustable fractional divider with a busy bit to wait
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* when the divider is adjusted.
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*/
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struct clk_frac {
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struct clk_hw hw;
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void __iomem *reg;
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u8 shift;
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u8 width;
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u8 busy;
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};
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#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw)
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static unsigned long clk_frac_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_frac *frac = to_clk_frac(hw);
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u32 div;
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u64 tmp_rate;
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div = readl_relaxed(frac->reg) >> frac->shift;
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div &= (1 << frac->width) - 1;
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tmp_rate = (u64)parent_rate * div;
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return tmp_rate >> frac->width;
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}
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static long clk_frac_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct clk_frac *frac = to_clk_frac(hw);
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unsigned long parent_rate = *prate;
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u32 div;
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u64 tmp, tmp_rate, result;
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if (rate > parent_rate)
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return -EINVAL;
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tmp = rate;
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tmp <<= frac->width;
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do_div(tmp, parent_rate);
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div = tmp;
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if (!div)
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return -EINVAL;
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tmp_rate = (u64)parent_rate * div;
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result = tmp_rate >> frac->width;
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if ((result << frac->width) < tmp_rate)
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result += 1;
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return result;
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}
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static int clk_frac_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_frac *frac = to_clk_frac(hw);
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unsigned long flags;
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u32 div, val;
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u64 tmp;
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if (rate > parent_rate)
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return -EINVAL;
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tmp = rate;
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tmp <<= frac->width;
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do_div(tmp, parent_rate);
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div = tmp;
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if (!div)
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return -EINVAL;
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spin_lock_irqsave(&mxs_lock, flags);
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val = readl_relaxed(frac->reg);
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val &= ~(((1 << frac->width) - 1) << frac->shift);
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val |= div << frac->shift;
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writel_relaxed(val, frac->reg);
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spin_unlock_irqrestore(&mxs_lock, flags);
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return mxs_clk_wait(frac->reg, frac->busy);
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}
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static const struct clk_ops clk_frac_ops = {
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.recalc_rate = clk_frac_recalc_rate,
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.round_rate = clk_frac_round_rate,
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.set_rate = clk_frac_set_rate,
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};
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struct clk *mxs_clk_frac(const char *name, const char *parent_name,
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void __iomem *reg, u8 shift, u8 width, u8 busy)
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{
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struct clk_frac *frac;
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struct clk *clk;
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struct clk_init_data init;
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frac = kzalloc(sizeof(*frac), GFP_KERNEL);
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if (!frac)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_frac_ops;
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init.flags = CLK_SET_RATE_PARENT;
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init.parent_names = (parent_name ? &parent_name: NULL);
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init.num_parents = (parent_name ? 1 : 0);
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frac->reg = reg;
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frac->shift = shift;
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frac->width = width;
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frac->busy = busy;
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frac->hw.init = &init;
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clk = clk_register(NULL, &frac->hw);
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if (IS_ERR(clk))
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kfree(frac);
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return clk;
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}
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