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e4d368e0b6
We use reset-simple in this patch so that pcie driver can use devm_reset_control_get() to get this reset data structure and use reset_control_deassert() to deassert pcie_power_up_rst_n. Link: https://lore.kernel.org/r/20210504105940.100004-3-greentime.hu@sifive.com Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Stephen Boyd <sboyd@kernel.org>
21 lines
525 B
Text
21 lines
525 B
Text
# SPDX-License-Identifier: GPL-2.0
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menuconfig CLK_SIFIVE
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bool "SiFive SoC driver support"
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depends on RISCV || COMPILE_TEST
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help
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SoC drivers for SiFive Linux-capable SoCs.
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if CLK_SIFIVE
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config CLK_SIFIVE_PRCI
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bool "PRCI driver for SiFive SoCs"
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select RESET_CONTROLLER
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select RESET_SIMPLE
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select CLK_ANALOGBITS_WRPLL_CLN28HPC
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help
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Supports the Power Reset Clock interface (PRCI) IP block found in
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FU540/FU740 SoCs. If this kernel is meant to run on a SiFive FU540/
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FU740 SoCs, enable this driver.
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endif
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