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ac7ea1c78f
Adds all the core steering helper functions that are needed in order to setup RoCE steering rules which includes both the RX and TX rules addition and deletion. As well as exporting the function to be ready to use from the IB driver where we expose functions to allow deletion of all rules, which is needed when a GID is deleted, or a deletion of a specific rule when an SA is deleted, and a similar manner for the rules addition. These functions are used in a later patch by IB driver to trigger the rules addition/deletion when needed. Signed-off-by: Patrisious Haddad <phaddad@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
32 lines
1.1 KiB
C
32 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
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/* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. */
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#ifndef MLX5_MACSEC_H
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#define MLX5_MACSEC_H
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#ifdef CONFIG_MLX5_MACSEC
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struct mlx5_macsec_event_data {
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struct mlx5_macsec_fs *macsec_fs;
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void *macdev;
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u32 fs_id;
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bool is_tx;
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};
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int mlx5_macsec_add_roce_rule(void *macdev, const struct sockaddr *addr, u16 gid_idx,
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struct list_head *tx_rules_list, struct list_head *rx_rules_list,
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struct mlx5_macsec_fs *macsec_fs);
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void mlx5_macsec_del_roce_rule(u16 gid_idx, struct mlx5_macsec_fs *macsec_fs,
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struct list_head *tx_rules_list, struct list_head *rx_rules_list);
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void mlx5_macsec_add_roce_sa_rules(u32 fs_id, const struct sockaddr *addr, u16 gid_idx,
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struct list_head *tx_rules_list,
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struct list_head *rx_rules_list,
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struct mlx5_macsec_fs *macsec_fs, bool is_tx);
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void mlx5_macsec_del_roce_sa_rules(u32 fs_id, struct mlx5_macsec_fs *macsec_fs,
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struct list_head *tx_rules_list,
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struct list_head *rx_rules_list, bool is_tx);
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#endif
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#endif /* MLX5_MACSEC_H */
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