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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
128 lines
4.5 KiB
C
128 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Driver for Sound Cors PDAudioCF soundcard
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*
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* Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
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*/
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#ifndef __PDAUDIOCF_H
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#define __PDAUDIOCF_H
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#include <sound/pcm.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <pcmcia/cistpl.h>
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#include <pcmcia/ds.h>
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#include <sound/ak4117.h>
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/* PDAUDIOCF registers */
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#define PDAUDIOCF_REG_MD 0x00 /* music data, R/O */
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#define PDAUDIOCF_REG_WDP 0x02 /* write data pointer / 2, R/O */
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#define PDAUDIOCF_REG_RDP 0x04 /* read data pointer / 2, R/O */
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#define PDAUDIOCF_REG_TCR 0x06 /* test control register W/O */
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#define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */
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#define PDAUDIOCF_REG_ISR 0x0a /* interrupt status, R/O */
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#define PDAUDIOCF_REG_IER 0x0c /* interrupt enable, R/W */
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#define PDAUDIOCF_REG_AK_IFR 0x0e /* AK interface register, R/W */
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/* PDAUDIOCF_REG_TCR */
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#define PDAUDIOCF_ELIMAKMBIT (1<<0) /* simulate AKM music data */
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#define PDAUDIOCF_TESTDATASEL (1<<1) /* test data selection, 0 = 0x55, 1 = pseudo-random */
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/* PDAUDIOCF_REG_SCR */
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#define PDAUDIOCF_AK_SBP (1<<0) /* serial port busy flag */
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#define PDAUDIOCF_RST (1<<2) /* FPGA, AKM + SRAM buffer reset */
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#define PDAUDIOCF_PDN (1<<3) /* power down bit */
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#define PDAUDIOCF_CLKDIV0 (1<<4) /* choose 24.576Mhz clock divided by 1,2,3 or 4 */
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#define PDAUDIOCF_CLKDIV1 (1<<5)
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#define PDAUDIOCF_RECORD (1<<6) /* start capturing to SRAM */
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#define PDAUDIOCF_AK_SDD (1<<7) /* music data detected */
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#define PDAUDIOCF_RED_LED_OFF (1<<8) /* red LED off override */
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#define PDAUDIOCF_BLUE_LED_OFF (1<<9) /* blue LED off override */
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#define PDAUDIOCF_DATAFMT0 (1<<10) /* data format bits: 00 = 16-bit, 01 = 18-bit */
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#define PDAUDIOCF_DATAFMT1 (1<<11) /* 10 = 20-bit, 11 = 24-bit, all right justified */
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#define PDAUDIOCF_FPGAREV(x) ((x>>12)&0x0f) /* FPGA revision */
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/* PDAUDIOCF_REG_ISR */
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#define PDAUDIOCF_IRQLVL (1<<0) /* Buffer level IRQ */
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#define PDAUDIOCF_IRQOVR (1<<1) /* Overrun IRQ */
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#define PDAUDIOCF_IRQAKM (1<<2) /* AKM IRQ */
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/* PDAUDIOCF_REG_IER */
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#define PDAUDIOCF_IRQLVLEN0 (1<<0) /* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
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#define PDAUDIOCF_IRQLVLEN1 (1<<1) /* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
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#define PDAUDIOCF_IRQOVREN (1<<2) /* enable overrun IRQ */
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#define PDAUDIOCF_IRQAKMEN (1<<3) /* enable AKM IRQ */
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#define PDAUDIOCF_BLUEDUTY0 (1<<8) /* blue LED duty cycle; 00 = 100%, 01 = 50% */
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#define PDAUDIOCF_BLUEDUTY1 (1<<9) /* 02 = 25%, 11 = 12% */
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#define PDAUDIOCF_REDDUTY0 (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */
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#define PDAUDIOCF_REDDUTY1 (1<<11) /* 02 = 25%, 11 = 12% */
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#define PDAUDIOCF_BLUESDD (1<<12) /* blue LED against SDD bit */
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#define PDAUDIOCF_BLUEMODULATE (1<<13) /* save power when 100% duty cycle selected */
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#define PDAUDIOCF_REDMODULATE (1<<14) /* save power when 100% duty cycle selected */
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#define PDAUDIOCF_HALFRATE (1<<15) /* slow both LED blinks by half (also spdif detect rate) */
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/* chip status */
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#define PDAUDIOCF_STAT_IS_STALE (1<<0)
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#define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
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#define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)
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struct snd_pdacf {
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struct snd_card *card;
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int index;
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unsigned long port;
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int irq;
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struct mutex reg_lock;
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unsigned short regmap[8];
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unsigned short suspend_reg_scr;
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spinlock_t ak4117_lock;
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struct ak4117 *ak4117;
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unsigned int chip_status;
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struct snd_pcm *pcm;
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struct snd_pcm_substream *pcm_substream;
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unsigned int pcm_running: 1;
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unsigned int pcm_channels;
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unsigned int pcm_swab;
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unsigned int pcm_little;
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unsigned int pcm_frame;
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unsigned int pcm_sample;
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unsigned int pcm_xor;
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unsigned int pcm_size;
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unsigned int pcm_period;
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unsigned int pcm_tdone;
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unsigned int pcm_hwptr;
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void *pcm_area;
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/* pcmcia stuff */
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struct pcmcia_device *p_dev;
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};
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static inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)
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{
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outw(chip->regmap[reg>>1] = val, chip->port + reg);
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}
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static inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)
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{
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return inw(chip->port + reg);
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}
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struct snd_pdacf *snd_pdacf_create(struct snd_card *card);
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int snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);
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void snd_pdacf_powerdown(struct snd_pdacf *chip);
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#ifdef CONFIG_PM
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int snd_pdacf_suspend(struct snd_pdacf *chip);
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int snd_pdacf_resume(struct snd_pdacf *chip);
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#endif
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int snd_pdacf_pcm_new(struct snd_pdacf *chip);
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irqreturn_t pdacf_interrupt(int irq, void *dev);
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irqreturn_t pdacf_threaded_irq(int irq, void *dev);
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void pdacf_reinit(struct snd_pdacf *chip, int resume);
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#endif /* __PDAUDIOCF_H */
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