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d0760b3bc8
The Atmel AT91SAM9263 processor includes many more integrated
peripherals than Atmel's previous ARM9-based AT91 processors, so this
has necessitated a few changes to the core AT91 support.
These changes are:
* The system peripheral I/O region we remap has increased from
0xFFFA0000..0xFFFFFFFF to 0xFFF78000..0xFFFFFFFF.
* The increased I/O region forces changes to entry-macro.S and
debug-macro.S due to ARM's limited immediate offset addressing
modes.
* Maximum number of GPIO banks increases to 5.
* 2 MMC controllers so the board-setup code needs to specify which
controller it wishes to use when calling at91_add_device_mmc().
Original patch from Nicolas Ferre.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
/*
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* include/asm-arm/arch-at91/irqs.h
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*
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* Copyright (C) 2004 SAN People
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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#include <asm/arch/at91_aic.h>
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#define NR_AIC_IRQS 32
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/*
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* Acknowledge interrupt with AIC after interrupt has been handled.
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* (by kernel/irq.c)
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*/
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#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0)
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/*
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* IRQ interrupt symbols are the AT91xxx_ID_* symbols
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* for IRQs handled directly through the AIC, or else the AT91_PIN_*
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* symbols in gpio.h for ones handled indirectly as GPIOs.
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* We make provision for 5 banks of GPIO.
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*/
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#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
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#endif
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