mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-18 08:35:03 +00:00
3642eb2125
THREAD_ALIGN_SHIFT = THREAD_SHIFT + 1 = PAGE_SHIFT + 1
Maximum PAGE_SHIFT is 18 for 256k pages so
THREAD_ALIGN_SHIFT is 19 at the maximum.
No need to clobber cr1, it can be preserved when moving r1
into CR when we check stack overflow.
This reduces the number of instructions in Machine Check Exception
prolog and fixes a build failure reported by the kernel test robot
on v5.10 stable when building with RTAS + VMAP_STACK + KVM. That
build failure is due to too many instructions in the prolog hence
not fitting between 0x200 and 0x300. Allthough the problem doesn't
show up in mainline, it is still worth the change.
Fixes: 98bf2d3f49 ("powerpc/32s: Fix RTAS machine check with VMAP stack")
Cc: stable@vger.kernel.org
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/5ae4d545e3ac58e133d2599e0deb88843cb494fc.1612768623.git.christophe.leroy@csgroup.eu
346 lines
7.8 KiB
C
346 lines
7.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __HEAD_32_H__
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#define __HEAD_32_H__
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#include <asm/ptrace.h> /* for STACK_FRAME_REGS_MARKER */
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/*
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* Exception entry code. This code runs with address translation
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* turned off, i.e. using physical addresses.
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* We assume sprg3 has the physical address of the current
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* task's thread_struct.
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*/
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.macro EXCEPTION_PROLOG handle_dar_dsisr=0
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EXCEPTION_PROLOG_0 handle_dar_dsisr=\handle_dar_dsisr
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EXCEPTION_PROLOG_1
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EXCEPTION_PROLOG_2 handle_dar_dsisr=\handle_dar_dsisr
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.endm
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.macro EXCEPTION_PROLOG_0 handle_dar_dsisr=0
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mtspr SPRN_SPRG_SCRATCH0,r10
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mtspr SPRN_SPRG_SCRATCH1,r11
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#ifdef CONFIG_VMAP_STACK
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mfspr r10, SPRN_SPRG_THREAD
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.if \handle_dar_dsisr
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mfspr r11, SPRN_DAR
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stw r11, DAR(r10)
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mfspr r11, SPRN_DSISR
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stw r11, DSISR(r10)
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.endif
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mfspr r11, SPRN_SRR0
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stw r11, SRR0(r10)
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#endif
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mfspr r11, SPRN_SRR1 /* check whether user or kernel */
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#ifdef CONFIG_VMAP_STACK
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stw r11, SRR1(r10)
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#endif
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mfcr r10
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andi. r11, r11, MSR_PR
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.endm
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.macro EXCEPTION_PROLOG_1 for_rtas=0
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#ifdef CONFIG_VMAP_STACK
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mtspr SPRN_SPRG_SCRATCH2,r1
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subi r1, r1, INT_FRAME_SIZE /* use r1 if kernel */
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beq 1f
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mfspr r1,SPRN_SPRG_THREAD
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lwz r1,TASK_STACK-THREAD(r1)
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addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
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1:
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mtcrf 0x3f, r1
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bt 32 - THREAD_ALIGN_SHIFT, stack_overflow
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#else
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subi r11, r1, INT_FRAME_SIZE /* use r1 if kernel */
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beq 1f
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mfspr r11,SPRN_SPRG_THREAD
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lwz r11,TASK_STACK-THREAD(r11)
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addi r11, r11, THREAD_SIZE - INT_FRAME_SIZE
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1: tophys(r11, r11)
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#endif
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.endm
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.macro EXCEPTION_PROLOG_2 handle_dar_dsisr=0
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#ifdef CONFIG_VMAP_STACK
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li r11, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
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mtmsr r11
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isync
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mfspr r11, SPRN_SPRG_SCRATCH2
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stw r11,GPR1(r1)
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stw r11,0(r1)
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mr r11, r1
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#else
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stw r1,GPR1(r11)
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stw r1,0(r11)
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tovirt(r1, r11) /* set new kernel sp */
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#endif
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stw r10,_CCR(r11) /* save registers */
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stw r12,GPR12(r11)
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stw r9,GPR9(r11)
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mfspr r10,SPRN_SPRG_SCRATCH0
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mfspr r12,SPRN_SPRG_SCRATCH1
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stw r10,GPR10(r11)
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stw r12,GPR11(r11)
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mflr r10
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stw r10,_LINK(r11)
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#ifdef CONFIG_VMAP_STACK
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mfspr r12, SPRN_SPRG_THREAD
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tovirt(r12, r12)
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.if \handle_dar_dsisr
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lwz r10, DAR(r12)
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stw r10, _DAR(r11)
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lwz r10, DSISR(r12)
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stw r10, _DSISR(r11)
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.endif
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lwz r9, SRR1(r12)
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lwz r12, SRR0(r12)
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#else
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mfspr r12,SPRN_SRR0
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mfspr r9,SPRN_SRR1
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#endif
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#ifdef CONFIG_40x
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rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
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#else
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#ifdef CONFIG_VMAP_STACK
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li r10, MSR_KERNEL & ~MSR_IR /* can take exceptions */
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#else
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li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR) /* can take exceptions */
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#endif
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mtmsr r10 /* (except for mach check in rtas) */
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#endif
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stw r0,GPR0(r11)
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lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
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addi r10,r10,STACK_FRAME_REGS_MARKER@l
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stw r10,8(r11)
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SAVE_4GPRS(3, r11)
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SAVE_2GPRS(7, r11)
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.endm
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.macro SYSCALL_ENTRY trapno
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mfspr r12,SPRN_SPRG_THREAD
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mfspr r9, SPRN_SRR1
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#ifdef CONFIG_VMAP_STACK
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mfspr r11, SPRN_SRR0
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mtctr r11
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andi. r11, r9, MSR_PR
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mr r11, r1
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lwz r1,TASK_STACK-THREAD(r12)
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beq- 99f
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addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
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li r10, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
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mtmsr r10
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isync
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tovirt(r12, r12)
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stw r11,GPR1(r1)
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stw r11,0(r1)
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mr r11, r1
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#else
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andi. r11, r9, MSR_PR
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lwz r11,TASK_STACK-THREAD(r12)
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beq- 99f
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addi r11, r11, THREAD_SIZE - INT_FRAME_SIZE
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tophys(r11, r11)
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stw r1,GPR1(r11)
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stw r1,0(r11)
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tovirt(r1, r11) /* set new kernel sp */
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#endif
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mflr r10
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stw r10, _LINK(r11)
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#ifdef CONFIG_VMAP_STACK
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mfctr r10
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#else
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mfspr r10,SPRN_SRR0
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#endif
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stw r10,_NIP(r11)
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mfcr r10
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rlwinm r10,r10,0,4,2 /* Clear SO bit in CR */
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stw r10,_CCR(r11) /* save registers */
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#ifdef CONFIG_40x
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rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
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#else
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#ifdef CONFIG_VMAP_STACK
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LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~MSR_IR) /* can take exceptions */
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#else
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LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~(MSR_IR|MSR_DR)) /* can take exceptions */
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#endif
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mtmsr r10 /* (except for mach check in rtas) */
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#endif
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lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
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stw r2,GPR2(r11)
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addi r10,r10,STACK_FRAME_REGS_MARKER@l
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stw r9,_MSR(r11)
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li r2, \trapno + 1
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stw r10,8(r11)
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stw r2,_TRAP(r11)
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SAVE_GPR(0, r11)
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SAVE_4GPRS(3, r11)
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SAVE_2GPRS(7, r11)
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addi r11,r1,STACK_FRAME_OVERHEAD
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addi r2,r12,-THREAD
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stw r11,PT_REGS(r12)
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#if defined(CONFIG_40x)
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/* Check to see if the dbcr0 register is set up to debug. Use the
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internal debug mode bit to do this. */
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lwz r12,THREAD_DBCR0(r12)
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andis. r12,r12,DBCR0_IDM@h
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#endif
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ACCOUNT_CPU_USER_ENTRY(r2, r11, r12)
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#if defined(CONFIG_40x)
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beq+ 3f
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/* From user and task is ptraced - load up global dbcr0 */
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li r12,-1 /* clear all pending debug events */
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mtspr SPRN_DBSR,r12
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lis r11,global_dbcr0@ha
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tophys(r11,r11)
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addi r11,r11,global_dbcr0@l
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lwz r12,0(r11)
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mtspr SPRN_DBCR0,r12
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lwz r12,4(r11)
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addi r12,r12,-1
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stw r12,4(r11)
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#endif
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3:
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tovirt_novmstack r2, r2 /* set r2 to current */
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lis r11, transfer_to_syscall@h
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ori r11, r11, transfer_to_syscall@l
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#ifdef CONFIG_TRACE_IRQFLAGS
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/*
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* If MSR is changing we need to keep interrupts disabled at this point
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* otherwise we might risk taking an interrupt before we tell lockdep
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* they are enabled.
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*/
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LOAD_REG_IMMEDIATE(r10, MSR_KERNEL)
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rlwimi r10, r9, 0, MSR_EE
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#else
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LOAD_REG_IMMEDIATE(r10, MSR_KERNEL | MSR_EE)
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#endif
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#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PERF_EVENTS)
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mtspr SPRN_NRI, r0
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#endif
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mtspr SPRN_SRR1,r10
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mtspr SPRN_SRR0,r11
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rfi /* jump to handler, enable MMU */
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#ifdef CONFIG_40x
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b . /* Prevent prefetch past rfi */
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#endif
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99: b ret_from_kernel_syscall
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.endm
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.macro save_dar_dsisr_on_stack reg1, reg2, sp
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#ifndef CONFIG_VMAP_STACK
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mfspr \reg1, SPRN_DAR
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mfspr \reg2, SPRN_DSISR
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stw \reg1, _DAR(\sp)
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stw \reg2, _DSISR(\sp)
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#endif
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.endm
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.macro get_and_save_dar_dsisr_on_stack reg1, reg2, sp
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#ifdef CONFIG_VMAP_STACK
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lwz \reg1, _DAR(\sp)
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lwz \reg2, _DSISR(\sp)
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#else
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save_dar_dsisr_on_stack \reg1, \reg2, \sp
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#endif
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.endm
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.macro tovirt_vmstack dst, src
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#ifdef CONFIG_VMAP_STACK
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tovirt(\dst, \src)
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#else
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.ifnc \dst, \src
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mr \dst, \src
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.endif
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#endif
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.endm
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.macro tovirt_novmstack dst, src
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#ifndef CONFIG_VMAP_STACK
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tovirt(\dst, \src)
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#else
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.ifnc \dst, \src
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mr \dst, \src
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.endif
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#endif
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.endm
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.macro tophys_novmstack dst, src
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#ifndef CONFIG_VMAP_STACK
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tophys(\dst, \src)
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#else
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.ifnc \dst, \src
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mr \dst, \src
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.endif
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#endif
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.endm
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/*
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* Note: code which follows this uses cr0.eq (set if from kernel),
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* r11, r12 (SRR0), and r9 (SRR1).
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*
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* Note2: once we have set r1 we are in a position to take exceptions
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* again, and we could thus set MSR:RI at that point.
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*/
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/*
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* Exception vectors.
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*/
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#ifdef CONFIG_PPC_BOOK3S
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#define START_EXCEPTION(n, label) \
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. = n; \
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DO_KVM n; \
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label:
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#else
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#define START_EXCEPTION(n, label) \
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. = n; \
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label:
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#endif
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#define EXCEPTION(n, label, hdlr, xfer) \
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START_EXCEPTION(n, label) \
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EXCEPTION_PROLOG; \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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xfer(n, hdlr)
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#define EXC_XFER_TEMPLATE(hdlr, trap, msr, tfer, ret) \
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li r10,trap; \
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stw r10,_TRAP(r11); \
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LOAD_REG_IMMEDIATE(r10, msr); \
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bl tfer; \
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.long hdlr; \
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.long ret
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#define EXC_XFER_STD(n, hdlr) \
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EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, transfer_to_handler_full, \
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ret_from_except_full)
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#define EXC_XFER_LITE(n, hdlr) \
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EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, transfer_to_handler, \
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ret_from_except)
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.macro vmap_stack_overflow_exception
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#ifdef CONFIG_VMAP_STACK
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#ifdef CONFIG_SMP
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mfspr r1, SPRN_SPRG_THREAD
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lwz r1, TASK_CPU - THREAD(r1)
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slwi r1, r1, 3
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addis r1, r1, emergency_ctx@ha
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#else
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lis r1, emergency_ctx@ha
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#endif
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lwz r1, emergency_ctx@l(r1)
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cmpwi cr1, r1, 0
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bne cr1, 1f
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lis r1, init_thread_union@ha
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addi r1, r1, init_thread_union@l
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1: addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
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EXCEPTION_PROLOG_2
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SAVE_NVGPRS(r11)
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addi r3, r1, STACK_FRAME_OVERHEAD
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EXC_XFER_STD(0, stack_overflow_exception)
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#endif
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.endm
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#endif /* __HEAD_32_H__ */
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