mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-11-01 17:08:10 +00:00
d8b212014e
Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
|
|
* Copyright (c) 2013, The Linux Foundation. All rights reserved.
|
|
*
|
|
* This software is licensed under the terms of the GNU General Public
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
* may be copied, distributed, and modified under those terms.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_RESET_MSM_MMCC_8974_H
|
|
#define _DT_BINDINGS_RESET_MSM_MMCC_8974_H
|
|
|
|
#define SPDM_RESET 0
|
|
#define SPDM_RM_RESET 1
|
|
#define VENUS0_RESET 2
|
|
#define MDSS_RESET 3
|
|
#define CAMSS_PHY0_RESET 4
|
|
#define CAMSS_PHY1_RESET 5
|
|
#define CAMSS_PHY2_RESET 6
|
|
#define CAMSS_CSI0_RESET 7
|
|
#define CAMSS_CSI0PHY_RESET 8
|
|
#define CAMSS_CSI0RDI_RESET 9
|
|
#define CAMSS_CSI0PIX_RESET 10
|
|
#define CAMSS_CSI1_RESET 11
|
|
#define CAMSS_CSI1PHY_RESET 12
|
|
#define CAMSS_CSI1RDI_RESET 13
|
|
#define CAMSS_CSI1PIX_RESET 14
|
|
#define CAMSS_CSI2_RESET 15
|
|
#define CAMSS_CSI2PHY_RESET 16
|
|
#define CAMSS_CSI2RDI_RESET 17
|
|
#define CAMSS_CSI2PIX_RESET 18
|
|
#define CAMSS_CSI3_RESET 19
|
|
#define CAMSS_CSI3PHY_RESET 20
|
|
#define CAMSS_CSI3RDI_RESET 21
|
|
#define CAMSS_CSI3PIX_RESET 22
|
|
#define CAMSS_ISPIF_RESET 23
|
|
#define CAMSS_CCI_RESET 24
|
|
#define CAMSS_MCLK0_RESET 25
|
|
#define CAMSS_MCLK1_RESET 26
|
|
#define CAMSS_MCLK2_RESET 27
|
|
#define CAMSS_MCLK3_RESET 28
|
|
#define CAMSS_GP0_RESET 29
|
|
#define CAMSS_GP1_RESET 30
|
|
#define CAMSS_TOP_RESET 31
|
|
#define CAMSS_MICRO_RESET 32
|
|
#define CAMSS_JPEG_RESET 33
|
|
#define CAMSS_VFE_RESET 34
|
|
#define CAMSS_CSI_VFE0_RESET 35
|
|
#define CAMSS_CSI_VFE1_RESET 36
|
|
#define OXILI_RESET 37
|
|
#define OXILICX_RESET 38
|
|
#define OCMEMCX_RESET 39
|
|
#define MMSS_RBCRP_RESET 40
|
|
#define MMSSNOCAHB_RESET 41
|
|
#define MMSSNOCAXI_RESET 42
|
|
#define OCMEMNOC_RESET 43
|
|
|
|
#endif
|