mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-30 06:10:56 +00:00
c884d8ac7f
Another round of SPDX updates for 5.2-rc6 Here is what I am guessing is going to be the last "big" SPDX update for 5.2. It contains all of the remaining GPLv2 and GPLv2+ updates that were "easy" to determine by pattern matching. The ones after this are going to be a bit more difficult and the people on the spdx list will be discussing them on a case-by-case basis now. Another 5000+ files are fixed up, so our overall totals are: Files checked: 64545 Files with SPDX: 45529 Compared to the 5.1 kernel which was: Files checked: 63848 Files with SPDX: 22576 This is a huge improvement. Also, we deleted another 20000 lines of boilerplate license crud, always nice to see in a diffstat. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXQyQYA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymnGQCghETUBotn1p3hTjY56VEs6dGzpHMAnRT0m+lv kbsjBGEJpLbMRB2krnaU =RMcT -----END PGP SIGNATURE----- Merge tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx Pull still more SPDX updates from Greg KH: "Another round of SPDX updates for 5.2-rc6 Here is what I am guessing is going to be the last "big" SPDX update for 5.2. It contains all of the remaining GPLv2 and GPLv2+ updates that were "easy" to determine by pattern matching. The ones after this are going to be a bit more difficult and the people on the spdx list will be discussing them on a case-by-case basis now. Another 5000+ files are fixed up, so our overall totals are: Files checked: 64545 Files with SPDX: 45529 Compared to the 5.1 kernel which was: Files checked: 63848 Files with SPDX: 22576 This is a huge improvement. Also, we deleted another 20000 lines of boilerplate license crud, always nice to see in a diffstat" * tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (65 commits) treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 507 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 506 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 505 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 504 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 503 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 502 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 501 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 498 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 497 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 496 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 495 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 491 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 490 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 489 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 488 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 487 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 486 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 485 ...
70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
|
|
/*
|
|
* arch/arch/mach-ixp4xx/vulcan-pci.c
|
|
*
|
|
* Vulcan board-level PCI initialization
|
|
*
|
|
* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
|
|
*
|
|
* based on ixdp425-pci.c:
|
|
* Copyright (C) 2002 Intel Corporation.
|
|
* Copyright (C) 2003-2004 MontaVista Software, Inc.
|
|
*/
|
|
|
|
#include <linux/pci.h>
|
|
#include <linux/init.h>
|
|
#include <linux/irq.h>
|
|
#include <asm/mach/pci.h>
|
|
#include <asm/mach-types.h>
|
|
|
|
#include "irqs.h"
|
|
|
|
/* PCI controller GPIO to IRQ pin mappings */
|
|
#define INTA 2
|
|
#define INTB 3
|
|
|
|
void __init vulcan_pci_preinit(void)
|
|
{
|
|
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
|
|
/*
|
|
* Cardbus bridge wants way more than the SoC can actually offer,
|
|
* and leaves the whole PCI bus in a mess. Artificially limit it
|
|
* to 8MB per region. Of course indirect mode doesn't have this
|
|
* limitation...
|
|
*/
|
|
pci_cardbus_mem_size = SZ_8M;
|
|
pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
|
|
(int)(pci_cardbus_mem_size >> 20));
|
|
#endif
|
|
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
|
|
ixp4xx_pci_preinit();
|
|
}
|
|
|
|
static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|
{
|
|
if (slot == 1)
|
|
return IXP4XX_GPIO_IRQ(INTA);
|
|
|
|
if (slot == 2)
|
|
return IXP4XX_GPIO_IRQ(INTB);
|
|
|
|
return -1;
|
|
}
|
|
|
|
struct hw_pci vulcan_pci __initdata = {
|
|
.nr_controllers = 1,
|
|
.ops = &ixp4xx_ops,
|
|
.preinit = vulcan_pci_preinit,
|
|
.setup = ixp4xx_setup,
|
|
.map_irq = vulcan_map_irq,
|
|
};
|
|
|
|
int __init vulcan_pci_init(void)
|
|
{
|
|
if (machine_is_arcom_vulcan())
|
|
pci_common_init(&vulcan_pci);
|
|
return 0;
|
|
}
|
|
|
|
subsys_initcall(vulcan_pci_init);
|