linux-stable/drivers/clk/st
Arnd Bergmann 2dd52d7f6f clk: st: avoid uninitialized variable use
quadfs_pll_fs660c32_round_rate prints a few structure members
that are never initialized, and also doesn't print the only one
it cares about. We get a gcc warning about the ones that
are printed:

clk/st/clkgen-fsyn.c:560:93: warning: 'params.sdiv' may be used uninitialized in this function
clk/st/clkgen-fsyn.c:560:93: warning: 'params.mdiv' may be used uninitialized in this function
clk/st/clkgen-fsyn.c:560:93: warning: 'params.pe' may be used uninitialized in this function
clk/st/clkgen-fsyn.c:560:93: warning: 'params.nsdiv' may be used uninitialized in this function

This changes the code to no longer print uninitialized data, and
for good measure it also prints the ndiv member that is being
set.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 5f7aa9071e ("clk: st: Support for QUADFS inside ClockGenB/C/D/E/F")
Acked-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-20 10:59:26 -08:00
..
clk-flexgen.c clk: st: fix handling result of of_property_count_strings 2015-10-01 15:21:50 -07:00
clkgen-fsyn.c clk: st: avoid uninitialized variable use 2015-11-20 10:59:26 -08:00
clkgen-mux.c drivers: clk: st: PLL rate change implementation for DVFS 2015-10-08 23:52:58 -07:00
clkgen-pll.c drivers: clk: st: Correct the pll-type for A9 for stih418 2015-10-08 23:52:59 -07:00
clkgen.h drivers: clk: st: PLL rate change implementation for DVFS 2015-10-08 23:52:58 -07:00
Makefile clk: st: STiH407: Support for Flexgen Clocks 2014-07-28 22:36:24 -07:00