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![Alan Cox](/assets/img/avatar_default.png)
We don't need it, we have a perfectly good set of debug tools. For this pass keep a few debug printks around which are "should not happen" items Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
1199 lines
31 KiB
C
1199 lines
31 KiB
C
/*
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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* Copyright * 2005 Agere Systems Inc.
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* All rights reserved.
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* http://www.agere.com
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*
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*------------------------------------------------------------------------------
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*
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* et1310_phy.c - Routines for configuring and accessing the PHY
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*
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*------------------------------------------------------------------------------
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*
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* SOFTWARE LICENSE
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*
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* This software is provided subject to the following terms and conditions,
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* which you should read carefully before using the software. Using this
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* software indicates your acceptance of these terms and conditions. If you do
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* not agree with these terms and conditions, do not use the software.
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*
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* Copyright * 2005 Agere Systems Inc.
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* All rights reserved.
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*
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* Redistribution and use in source or binary forms, with or without
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* modifications, are permitted provided that the following conditions are met:
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*
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* . Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following Disclaimer as comments in the code as
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* well as in the documentation and/or other materials provided with the
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* distribution.
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*
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* . Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following Disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* . Neither the name of Agere Systems Inc. nor the names of the contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* Disclaimer
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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*
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*/
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#include "et131x_version.h"
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#include "et131x_defs.h"
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/ctype.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/interrupt.h>
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#include <linux/in.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/if_arp.h>
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#include <linux/ioport.h>
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#include <linux/random.h>
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#include "et1310_phy.h"
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#include "et1310_pm.h"
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#include "et1310_jagcore.h"
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#include "et131x_adapter.h"
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#include "et131x_netdev.h"
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#include "et131x_initpci.h"
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#include "et1310_address_map.h"
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#include "et1310_tx.h"
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#include "et1310_rx.h"
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#include "et1310_mac.h"
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/* Prototypes for functions with local scope */
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static int et131x_xcvr_init(struct et131x_adapter *adapter);
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/**
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* PhyMiRead - Read from the PHY through the MII Interface on the MAC
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* @adapter: pointer to our private adapter structure
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* @xcvrAddr: the address of the transciever
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* @xcvrReg: the register to read
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* @value: pointer to a 16-bit value in which the value will be stored
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*
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* Returns 0 on success, errno on failure (as defined in errno.h)
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*/
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int PhyMiRead(struct et131x_adapter *adapter, uint8_t xcvrAddr,
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uint8_t xcvrReg, uint16_t *value)
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{
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struct _MAC_t __iomem *mac = &adapter->regs->mac;
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int status = 0;
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uint32_t delay;
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MII_MGMT_ADDR_t miiAddr;
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MII_MGMT_CMD_t miiCmd;
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MII_MGMT_INDICATOR_t miiIndicator;
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/* Save a local copy of the registers we are dealing with so we can
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* set them back
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*/
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miiAddr.value = readl(&mac->mii_mgmt_addr.value);
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miiCmd.value = readl(&mac->mii_mgmt_cmd.value);
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/* Stop the current operation */
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writel(0, &mac->mii_mgmt_cmd.value);
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/* Set up the register we need to read from on the correct PHY */
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{
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MII_MGMT_ADDR_t mii_mgmt_addr = { 0 };
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mii_mgmt_addr.bits.phy_addr = xcvrAddr;
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mii_mgmt_addr.bits.reg_addr = xcvrReg;
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writel(mii_mgmt_addr.value, &mac->mii_mgmt_addr.value);
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}
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/* Kick the read cycle off */
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delay = 0;
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writel(0x1, &mac->mii_mgmt_cmd.value);
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do {
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udelay(50);
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delay++;
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miiIndicator.value = readl(&mac->mii_mgmt_indicator.value);
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} while ((miiIndicator.bits.not_valid || miiIndicator.bits.busy) &&
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delay < 50);
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/* If we hit the max delay, we could not read the register */
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if (delay >= 50) {
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dev_warn(&adapter->pdev->dev,
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"xcvrReg 0x%08x could not be read\n", xcvrReg);
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dev_warn(&adapter->pdev->dev, "status is 0x%08x\n",
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miiIndicator.value);
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status = -EIO;
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}
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/* If we hit here we were able to read the register and we need to
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* return the value to the caller
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*/
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/* TODO: make this stuff a simple readw()?! */
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{
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MII_MGMT_STAT_t mii_mgmt_stat;
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mii_mgmt_stat.value = readl(&mac->mii_mgmt_stat.value);
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*value = (uint16_t) mii_mgmt_stat.bits.phy_stat;
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}
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/* Stop the read operation */
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writel(0, &mac->mii_mgmt_cmd.value);
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/* set the registers we touched back to the state at which we entered
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* this function
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*/
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writel(miiAddr.value, &mac->mii_mgmt_addr.value);
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writel(miiCmd.value, &mac->mii_mgmt_cmd.value);
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return status;
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}
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/**
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* MiWrite - Write to a PHY register through the MII interface of the MAC
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* @adapter: pointer to our private adapter structure
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* @xcvrReg: the register to read
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* @value: 16-bit value to write
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*
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* Return 0 on success, errno on failure (as defined in errno.h)
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*/
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int MiWrite(struct et131x_adapter *adapter, uint8_t xcvrReg, uint16_t value)
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{
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struct _MAC_t __iomem *mac = &adapter->regs->mac;
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int status = 0;
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uint8_t xcvrAddr = adapter->Stats.xcvr_addr;
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uint32_t delay;
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MII_MGMT_ADDR_t miiAddr;
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MII_MGMT_CMD_t miiCmd;
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MII_MGMT_INDICATOR_t miiIndicator;
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/* Save a local copy of the registers we are dealing with so we can
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* set them back
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*/
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miiAddr.value = readl(&mac->mii_mgmt_addr.value);
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miiCmd.value = readl(&mac->mii_mgmt_cmd.value);
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/* Stop the current operation */
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writel(0, &mac->mii_mgmt_cmd.value);
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/* Set up the register we need to write to on the correct PHY */
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{
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MII_MGMT_ADDR_t mii_mgmt_addr;
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mii_mgmt_addr.bits.phy_addr = xcvrAddr;
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mii_mgmt_addr.bits.reg_addr = xcvrReg;
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writel(mii_mgmt_addr.value, &mac->mii_mgmt_addr.value);
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}
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/* Add the value to write to the registers to the mac */
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writel(value, &mac->mii_mgmt_ctrl.value);
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delay = 0;
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do {
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udelay(50);
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delay++;
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miiIndicator.value = readl(&mac->mii_mgmt_indicator.value);
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} while (miiIndicator.bits.busy && delay < 100);
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/* If we hit the max delay, we could not write the register */
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if (delay == 100) {
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uint16_t TempValue;
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dev_warn(&adapter->pdev->dev,
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"xcvrReg 0x%08x could not be written", xcvrReg);
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dev_warn(&adapter->pdev->dev, "status is 0x%08x\n",
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miiIndicator.value);
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dev_warn(&adapter->pdev->dev, "command is 0x%08x\n",
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readl(&mac->mii_mgmt_cmd.value));
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MiRead(adapter, xcvrReg, &TempValue);
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status = -EIO;
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}
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/* Stop the write operation */
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writel(0, &mac->mii_mgmt_cmd.value);
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/* set the registers we touched back to the state at which we entered
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* this function
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*/
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writel(miiAddr.value, &mac->mii_mgmt_addr.value);
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writel(miiCmd.value, &mac->mii_mgmt_cmd.value);
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return status;
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}
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/**
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* et131x_xcvr_find - Find the PHY ID
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* @adapter: pointer to our private adapter structure
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*
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* Returns 0 on success, errno on failure (as defined in errno.h)
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*/
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int et131x_xcvr_find(struct et131x_adapter *adapter)
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{
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int status = -ENODEV;
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uint8_t xcvr_addr;
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MI_IDR1_t idr1;
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MI_IDR2_t idr2;
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uint32_t xcvr_id;
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/* We need to get xcvr id and address we just get the first one */
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for (xcvr_addr = 0; xcvr_addr < 32; xcvr_addr++) {
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/* Read the ID from the PHY */
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PhyMiRead(adapter, xcvr_addr,
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(uint8_t) offsetof(MI_REGS_t, idr1),
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&idr1.value);
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PhyMiRead(adapter, xcvr_addr,
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(uint8_t) offsetof(MI_REGS_t, idr2),
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&idr2.value);
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xcvr_id = (uint32_t) ((idr1.value << 16) | idr2.value);
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if ((idr1.value != 0) && (idr1.value != 0xffff)) {
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adapter->Stats.xcvr_id = xcvr_id;
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adapter->Stats.xcvr_addr = xcvr_addr;
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status = 0;
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break;
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}
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}
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return status;
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}
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/**
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* et131x_setphy_normal - Set PHY for normal operation.
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* @adapter: pointer to our private adapter structure
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*
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* Used by Power Management to force the PHY into 10 Base T half-duplex mode,
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* when going to D3 in WOL mode. Also used during initialization to set the
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* PHY for normal operation.
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*/
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int et131x_setphy_normal(struct et131x_adapter *adapter)
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{
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int status;
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/* Make sure the PHY is powered up */
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ET1310_PhyPowerDown(adapter, 0);
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status = et131x_xcvr_init(adapter);
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return status;
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}
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/**
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* et131x_xcvr_init - Init the phy if we are setting it into force mode
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* @adapter: pointer to our private adapter structure
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*
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* Returns 0 on success, errno on failure (as defined in errno.h)
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*/
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static int et131x_xcvr_init(struct et131x_adapter *adapter)
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{
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int status = 0;
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MI_IMR_t imr;
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MI_ISR_t isr;
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MI_LCR2_t lcr2;
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/* Zero out the adapter structure variable representing BMSR */
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adapter->Bmsr.value = 0;
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MiRead(adapter, (uint8_t) offsetof(MI_REGS_t, isr), &isr.value);
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MiRead(adapter, (uint8_t) offsetof(MI_REGS_t, imr), &imr.value);
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/* Set the link status interrupt only. Bad behavior when link status
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* and auto neg are set, we run into a nested interrupt problem
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*/
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imr.bits.int_en = 0x1;
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imr.bits.link_status = 0x1;
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imr.bits.autoneg_status = 0x1;
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MiWrite(adapter, (uint8_t) offsetof(MI_REGS_t, imr), imr.value);
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/* Set the LED behavior such that LED 1 indicates speed (off =
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* 10Mbits, blink = 100Mbits, on = 1000Mbits) and LED 2 indicates
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* link and activity (on for link, blink off for activity).
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*
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* NOTE: Some customizations have been added here for specific
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* vendors; The LED behavior is now determined by vendor data in the
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* EEPROM. However, the above description is the default.
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*/
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if ((adapter->eepromData[1] & 0x4) == 0) {
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MiRead(adapter, (uint8_t) offsetof(MI_REGS_t, lcr2),
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&lcr2.value);
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if ((adapter->eepromData[1] & 0x8) == 0)
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lcr2.bits.led_tx_rx = 0x3;
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else
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lcr2.bits.led_tx_rx = 0x4;
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lcr2.bits.led_link = 0xa;
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MiWrite(adapter, (uint8_t) offsetof(MI_REGS_t, lcr2),
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lcr2.value);
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}
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/* Determine if we need to go into a force mode and set it */
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if (adapter->AiForceSpeed == 0 && adapter->AiForceDpx == 0) {
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if ((adapter->RegistryFlowControl == TxOnly) ||
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(adapter->RegistryFlowControl == Both)) {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_SET, 4, 11, NULL);
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} else {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_CLEAR, 4, 11, NULL);
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}
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if (adapter->RegistryFlowControl == Both) {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_SET, 4, 10, NULL);
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} else {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_CLEAR, 4, 10, NULL);
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}
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/* Set the phy to autonegotiation */
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ET1310_PhyAutoNeg(adapter, true);
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/* NOTE - Do we need this? */
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ET1310_PhyAccessMiBit(adapter, TRUEPHY_BIT_SET, 0, 9, NULL);
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return status;
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} else {
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ET1310_PhyAutoNeg(adapter, false);
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/* Set to the correct force mode. */
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if (adapter->AiForceDpx != 1) {
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if ((adapter->RegistryFlowControl == TxOnly) ||
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(adapter->RegistryFlowControl == Both)) {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_SET, 4, 11,
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NULL);
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} else {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_CLEAR, 4, 11,
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NULL);
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}
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if (adapter->RegistryFlowControl == Both) {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_SET, 4, 10,
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NULL);
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} else {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_CLEAR, 4, 10,
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NULL);
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}
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} else {
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_CLEAR, 4, 10, NULL);
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ET1310_PhyAccessMiBit(adapter,
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TRUEPHY_BIT_CLEAR, 4, 11, NULL);
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}
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switch (adapter->AiForceSpeed) {
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case 10:
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if (adapter->AiForceDpx == 1)
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TPAL_SetPhy10HalfDuplex(adapter);
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else if (adapter->AiForceDpx == 2)
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TPAL_SetPhy10FullDuplex(adapter);
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else
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TPAL_SetPhy10Force(adapter);
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break;
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case 100:
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if (adapter->AiForceDpx == 1)
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TPAL_SetPhy100HalfDuplex(adapter);
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else if (adapter->AiForceDpx == 2)
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TPAL_SetPhy100FullDuplex(adapter);
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else
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TPAL_SetPhy100Force(adapter);
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break;
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case 1000:
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TPAL_SetPhy1000FullDuplex(adapter);
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break;
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}
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return status;
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}
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}
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|
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void et131x_Mii_check(struct et131x_adapter *etdev,
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MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints)
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{
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uint8_t link_status;
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uint32_t autoneg_status;
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uint32_t speed;
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uint32_t duplex;
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uint32_t mdi_mdix;
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uint32_t masterslave;
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uint32_t polarity;
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unsigned long flags;
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if (bmsr_ints.bits.link_status) {
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if (bmsr.bits.link_status) {
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etdev->PoMgmt.TransPhyComaModeOnBoot = 20;
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/* Update our state variables and indicate the
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* connected state
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*/
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spin_lock_irqsave(&etdev->Lock, flags);
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etdev->MediaState = NETIF_STATUS_MEDIA_CONNECT;
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etdev->Flags &= ~fMP_ADAPTER_LINK_DETECTION;
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spin_unlock_irqrestore(&etdev->Lock, flags);
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/* Don't indicate state if we're in loopback mode */
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if (etdev->RegistryPhyLoopbk == false)
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netif_carrier_on(etdev->netdev);
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} else {
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dev_warn(&etdev->pdev->dev,
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"Link down - cable problem ?\n");
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if (etdev->linkspeed == TRUEPHY_SPEED_10MBPS) {
|
|
/* NOTE - Is there a way to query this without
|
|
* TruePHY?
|
|
* && TRU_QueryCoreType(etdev->hTruePhy, 0) == EMI_TRUEPHY_A13O) {
|
|
*/
|
|
uint16_t Register18;
|
|
|
|
MiRead(etdev, 0x12, &Register18);
|
|
MiWrite(etdev, 0x12, Register18 | 0x4);
|
|
MiWrite(etdev, 0x10, Register18 | 0x8402);
|
|
MiWrite(etdev, 0x11, Register18 | 511);
|
|
MiWrite(etdev, 0x12, Register18);
|
|
}
|
|
|
|
/* For the first N seconds of life, we are in "link
|
|
* detection" When we are in this state, we should
|
|
* only report "connected". When the LinkDetection
|
|
* Timer expires, we can report disconnected (handled
|
|
* in the LinkDetectionDPC).
|
|
*/
|
|
if (!(etdev->Flags & fMP_ADAPTER_LINK_DETECTION) ||
|
|
(etdev->MediaState == NETIF_STATUS_MEDIA_DISCONNECT)) {
|
|
spin_lock_irqsave(&etdev->Lock, flags);
|
|
etdev->MediaState =
|
|
NETIF_STATUS_MEDIA_DISCONNECT;
|
|
spin_unlock_irqrestore(&etdev->Lock,
|
|
flags);
|
|
|
|
/* Only indicate state if we're in loopback
|
|
* mode
|
|
*/
|
|
if (etdev->RegistryPhyLoopbk == false)
|
|
netif_carrier_off(etdev->netdev);
|
|
}
|
|
|
|
etdev->linkspeed = 0;
|
|
etdev->duplex_mode = 0;
|
|
|
|
/* Free the packets being actively sent & stopped */
|
|
et131x_free_busy_send_packets(etdev);
|
|
|
|
/* Re-initialize the send structures */
|
|
et131x_init_send(etdev);
|
|
|
|
/* Reset the RFD list and re-start RU */
|
|
et131x_reset_recv(etdev);
|
|
|
|
/*
|
|
* Bring the device back to the state it was during
|
|
* init prior to autonegotiation being complete. This
|
|
* way, when we get the auto-neg complete interrupt,
|
|
* we can complete init by calling ConfigMacREGS2.
|
|
*/
|
|
et131x_soft_reset(etdev);
|
|
|
|
/* Setup ET1310 as per the documentation */
|
|
et131x_adapter_setup(etdev);
|
|
|
|
/* Setup the PHY into coma mode until the cable is
|
|
* plugged back in
|
|
*/
|
|
if (etdev->RegistryPhyComa == 1)
|
|
EnablePhyComa(etdev);
|
|
}
|
|
}
|
|
|
|
if (bmsr_ints.bits.auto_neg_complete ||
|
|
(etdev->AiForceDpx == 3 && bmsr_ints.bits.link_status)) {
|
|
if (bmsr.bits.auto_neg_complete || etdev->AiForceDpx == 3) {
|
|
ET1310_PhyLinkStatus(etdev,
|
|
&link_status, &autoneg_status,
|
|
&speed, &duplex, &mdi_mdix,
|
|
&masterslave, &polarity);
|
|
|
|
etdev->linkspeed = speed;
|
|
etdev->duplex_mode = duplex;
|
|
|
|
etdev->PoMgmt.TransPhyComaModeOnBoot = 20;
|
|
|
|
if (etdev->linkspeed == TRUEPHY_SPEED_10MBPS) {
|
|
/*
|
|
* NOTE - Is there a way to query this without
|
|
* TruePHY?
|
|
* && TRU_QueryCoreType(etdev->hTruePhy, 0)== EMI_TRUEPHY_A13O) {
|
|
*/
|
|
uint16_t Register18;
|
|
|
|
MiRead(etdev, 0x12, &Register18);
|
|
MiWrite(etdev, 0x12, Register18 | 0x4);
|
|
MiWrite(etdev, 0x10, Register18 | 0x8402);
|
|
MiWrite(etdev, 0x11, Register18 | 511);
|
|
MiWrite(etdev, 0x12, Register18);
|
|
}
|
|
|
|
ConfigFlowControl(etdev);
|
|
|
|
if (etdev->linkspeed == TRUEPHY_SPEED_1000MBPS &&
|
|
etdev->RegistryJumboPacket > 2048)
|
|
ET1310_PhyAndOrReg(etdev, 0x16, 0xcfff,
|
|
0x2000);
|
|
|
|
SetRxDmaTimer(etdev);
|
|
ConfigMACRegs2(etdev);
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy10HalfDuplex - Force the phy into 10 Base T Half Duplex mode.
|
|
* @etdev: pointer to the adapter structure
|
|
*
|
|
* Also sets the MAC so it is syncd up properly
|
|
*/
|
|
void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* First we need to turn off all other advertisement */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Set our advertise values accordingly */
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_HALF);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy10FullDuplex - Force the phy into 10 Base T Full Duplex mode.
|
|
* @etdev: pointer to the adapter structure
|
|
*
|
|
* Also sets the MAC so it is syncd up properly
|
|
*/
|
|
void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* First we need to turn off all other advertisement */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Set our advertise values accordingly */
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy10Force - Force Base-T FD mode WITHOUT using autonegotiation
|
|
* @etdev: pointer to the adapter structure
|
|
*/
|
|
void TPAL_SetPhy10Force(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* Disable autoneg */
|
|
ET1310_PhyAutoNeg(etdev, false);
|
|
|
|
/* Disable all advertisement */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Force 10 Mbps */
|
|
ET1310_PhySpeedSelect(etdev, TRUEPHY_SPEED_10MBPS);
|
|
|
|
/* Force Full duplex */
|
|
ET1310_PhyDuplexMode(etdev, TRUEPHY_DUPLEX_FULL);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy100HalfDuplex - Force 100 Base T Half Duplex mode.
|
|
* @etdev: pointer to the adapter structure
|
|
*
|
|
* Also sets the MAC so it is syncd up properly.
|
|
*/
|
|
void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* first we need to turn off all other advertisement */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Set our advertise values accordingly */
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_HALF);
|
|
|
|
/* Set speed */
|
|
ET1310_PhySpeedSelect(etdev, TRUEPHY_SPEED_100MBPS);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy100FullDuplex - Force 100 Base T Full Duplex mode.
|
|
* @etdev: pointer to the adapter structure
|
|
*
|
|
* Also sets the MAC so it is syncd up properly
|
|
*/
|
|
void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* First we need to turn off all other advertisement */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Set our advertise values accordingly */
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy100Force - Force 100 BaseT FD mode WITHOUT using autonegotiation
|
|
* @etdev: pointer to the adapter structure
|
|
*/
|
|
void TPAL_SetPhy100Force(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* Disable autoneg */
|
|
ET1310_PhyAutoNeg(etdev, false);
|
|
|
|
/* Disable all advertisement */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Force 100 Mbps */
|
|
ET1310_PhySpeedSelect(etdev, TRUEPHY_SPEED_100MBPS);
|
|
|
|
/* Force Full duplex */
|
|
ET1310_PhyDuplexMode(etdev, TRUEPHY_DUPLEX_FULL);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhy1000FullDuplex - Force 1000 Base T Full Duplex mode
|
|
* @etdev: pointer to the adapter structure
|
|
*
|
|
* Also sets the MAC so it is syncd up properly.
|
|
*/
|
|
void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* first we need to turn off all other advertisement */
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* set our advertise values accordingly */
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
|
|
|
|
/* power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
/**
|
|
* TPAL_SetPhyAutoNeg - Set phy to autonegotiation mode.
|
|
* @etdev: pointer to the adapter structure
|
|
*/
|
|
void TPAL_SetPhyAutoNeg(struct et131x_adapter *etdev)
|
|
{
|
|
/* Power down PHY */
|
|
ET1310_PhyPowerDown(etdev, 1);
|
|
|
|
/* Turn on advertisement of all capabilities */
|
|
ET1310_PhyAdvertise10BaseT(etdev, TRUEPHY_ADV_DUPLEX_BOTH);
|
|
|
|
ET1310_PhyAdvertise100BaseT(etdev, TRUEPHY_ADV_DUPLEX_BOTH);
|
|
|
|
if (etdev->pdev->device != ET131X_PCI_DEVICE_ID_FAST)
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
|
|
else
|
|
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
|
|
|
|
/* Make sure auto-neg is ON (it is disabled in FORCE modes) */
|
|
ET1310_PhyAutoNeg(etdev, true);
|
|
|
|
/* Power up PHY */
|
|
ET1310_PhyPowerDown(etdev, 0);
|
|
}
|
|
|
|
|
|
/*
|
|
* The routines which follow provide low-level access to the PHY, and are used
|
|
* primarily by the routines above (although there are a few places elsewhere
|
|
* in the driver where this level of access is required).
|
|
*/
|
|
|
|
static const uint16_t ConfigPhy[25][2] = {
|
|
/* Reg Value Register */
|
|
/* Addr */
|
|
{0x880B, 0x0926}, /* AfeIfCreg4B1000Msbs */
|
|
{0x880C, 0x0926}, /* AfeIfCreg4B100Msbs */
|
|
{0x880D, 0x0926}, /* AfeIfCreg4B10Msbs */
|
|
|
|
{0x880E, 0xB4D3}, /* AfeIfCreg4B1000Lsbs */
|
|
{0x880F, 0xB4D3}, /* AfeIfCreg4B100Lsbs */
|
|
{0x8810, 0xB4D3}, /* AfeIfCreg4B10Lsbs */
|
|
|
|
{0x8805, 0xB03E}, /* AfeIfCreg3B1000Msbs */
|
|
{0x8806, 0xB03E}, /* AfeIfCreg3B100Msbs */
|
|
{0x8807, 0xFF00}, /* AfeIfCreg3B10Msbs */
|
|
|
|
{0x8808, 0xE090}, /* AfeIfCreg3B1000Lsbs */
|
|
{0x8809, 0xE110}, /* AfeIfCreg3B100Lsbs */
|
|
{0x880A, 0x0000}, /* AfeIfCreg3B10Lsbs */
|
|
|
|
{0x300D, 1}, /* DisableNorm */
|
|
|
|
{0x280C, 0x0180}, /* LinkHoldEnd */
|
|
|
|
{0x1C21, 0x0002}, /* AlphaM */
|
|
|
|
{0x3821, 6}, /* FfeLkgTx0 */
|
|
{0x381D, 1}, /* FfeLkg1g4 */
|
|
{0x381E, 1}, /* FfeLkg1g5 */
|
|
{0x381F, 1}, /* FfeLkg1g6 */
|
|
{0x3820, 1}, /* FfeLkg1g7 */
|
|
|
|
{0x8402, 0x01F0}, /* Btinact */
|
|
{0x800E, 20}, /* LftrainTime */
|
|
{0x800F, 24}, /* DvguardTime */
|
|
{0x8010, 46}, /* IdlguardTime */
|
|
|
|
{0, 0}
|
|
|
|
};
|
|
|
|
/* condensed version of the phy initialization routine */
|
|
void ET1310_PhyInit(struct et131x_adapter *etdev)
|
|
{
|
|
uint16_t data, index;
|
|
|
|
if (etdev == NULL)
|
|
return;
|
|
|
|
/* get the identity (again ?) */
|
|
MiRead(etdev, PHY_ID_1, &data);
|
|
MiRead(etdev, PHY_ID_2, &data);
|
|
|
|
/* what does this do/achieve ? */
|
|
MiRead(etdev, PHY_MPHY_CONTROL_REG, &data); /* should read 0002 */
|
|
MiWrite(etdev, PHY_MPHY_CONTROL_REG, 0x0006);
|
|
|
|
/* read modem register 0402, should I do something with the return
|
|
data ? */
|
|
MiWrite(etdev, PHY_INDEX_REG, 0x0402);
|
|
MiRead(etdev, PHY_DATA_REG, &data);
|
|
|
|
/* what does this do/achieve ? */
|
|
MiWrite(etdev, PHY_MPHY_CONTROL_REG, 0x0002);
|
|
|
|
/* get the identity (again ?) */
|
|
MiRead(etdev, PHY_ID_1, &data);
|
|
MiRead(etdev, PHY_ID_2, &data);
|
|
|
|
/* what does this achieve ? */
|
|
MiRead(etdev, PHY_MPHY_CONTROL_REG, &data); /* should read 0002 */
|
|
MiWrite(etdev, PHY_MPHY_CONTROL_REG, 0x0006);
|
|
|
|
/* read modem register 0402, should I do something with
|
|
the return data? */
|
|
MiWrite(etdev, PHY_INDEX_REG, 0x0402);
|
|
MiRead(etdev, PHY_DATA_REG, &data);
|
|
|
|
MiWrite(etdev, PHY_MPHY_CONTROL_REG, 0x0002);
|
|
|
|
/* what does this achieve (should return 0x1040) */
|
|
MiRead(etdev, PHY_CONTROL, &data);
|
|
MiRead(etdev, PHY_MPHY_CONTROL_REG, &data); /* should read 0002 */
|
|
MiWrite(etdev, PHY_CONTROL, 0x1840);
|
|
|
|
MiWrite(etdev, PHY_MPHY_CONTROL_REG, 0x0007);
|
|
|
|
/* here the writing of the array starts.... */
|
|
index = 0;
|
|
while (ConfigPhy[index][0] != 0x0000) {
|
|
/* write value */
|
|
MiWrite(etdev, PHY_INDEX_REG, ConfigPhy[index][0]);
|
|
MiWrite(etdev, PHY_DATA_REG, ConfigPhy[index][1]);
|
|
|
|
/* read it back */
|
|
MiWrite(etdev, PHY_INDEX_REG, ConfigPhy[index][0]);
|
|
MiRead(etdev, PHY_DATA_REG, &data);
|
|
|
|
/* do a check on the value read back ? */
|
|
index++;
|
|
}
|
|
/* here the writing of the array ends... */
|
|
|
|
MiRead(etdev, PHY_CONTROL, &data); /* 0x1840 */
|
|
MiRead(etdev, PHY_MPHY_CONTROL_REG, &data);/* should read 0007 */
|
|
MiWrite(etdev, PHY_CONTROL, 0x1040);
|
|
MiWrite(etdev, PHY_MPHY_CONTROL_REG, 0x0002);
|
|
}
|
|
|
|
void ET1310_PhyReset(struct et131x_adapter *etdev)
|
|
{
|
|
MiWrite(etdev, PHY_CONTROL, 0x8000);
|
|
}
|
|
|
|
void ET1310_PhyPowerDown(struct et131x_adapter *etdev, bool down)
|
|
{
|
|
uint16_t data;
|
|
|
|
MiRead(etdev, PHY_CONTROL, &data);
|
|
|
|
if (down == false) {
|
|
/* Power UP */
|
|
data &= ~0x0800;
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
} else {
|
|
/* Power DOWN */
|
|
data |= 0x0800;
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
}
|
|
}
|
|
|
|
void ET1310_PhyAutoNeg(struct et131x_adapter *etdev, bool enable)
|
|
{
|
|
uint16_t data;
|
|
|
|
MiRead(etdev, PHY_CONTROL, &data);
|
|
|
|
if (enable == true) {
|
|
/* Autonegotiation ON */
|
|
data |= 0x1000;
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
} else {
|
|
/* Autonegotiation OFF */
|
|
data &= ~0x1000;
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
}
|
|
}
|
|
|
|
void ET1310_PhyDuplexMode(struct et131x_adapter *etdev, uint16_t duplex)
|
|
{
|
|
uint16_t data;
|
|
|
|
MiRead(etdev, PHY_CONTROL, &data);
|
|
|
|
if (duplex == TRUEPHY_DUPLEX_FULL) {
|
|
/* Set Full Duplex */
|
|
data |= 0x100;
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
} else {
|
|
/* Set Half Duplex */
|
|
data &= ~0x100;
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
}
|
|
}
|
|
|
|
void ET1310_PhySpeedSelect(struct et131x_adapter *etdev, uint16_t speed)
|
|
{
|
|
uint16_t data;
|
|
|
|
/* Read the PHY control register */
|
|
MiRead(etdev, PHY_CONTROL, &data);
|
|
|
|
/* Clear all Speed settings (Bits 6, 13) */
|
|
data &= ~0x2040;
|
|
|
|
/* Reset the speed bits based on user selection */
|
|
switch (speed) {
|
|
case TRUEPHY_SPEED_10MBPS:
|
|
/* Bits already cleared above, do nothing */
|
|
break;
|
|
|
|
case TRUEPHY_SPEED_100MBPS:
|
|
/* 100M == Set bit 13 */
|
|
data |= 0x2000;
|
|
break;
|
|
|
|
case TRUEPHY_SPEED_1000MBPS:
|
|
default:
|
|
data |= 0x0040;
|
|
break;
|
|
}
|
|
|
|
/* Write back the new speed */
|
|
MiWrite(etdev, PHY_CONTROL, data);
|
|
}
|
|
|
|
void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *etdev,
|
|
uint16_t duplex)
|
|
{
|
|
uint16_t data;
|
|
|
|
/* Read the PHY 1000 Base-T Control Register */
|
|
MiRead(etdev, PHY_1000_CONTROL, &data);
|
|
|
|
/* Clear Bits 8,9 */
|
|
data &= ~0x0300;
|
|
|
|
switch (duplex) {
|
|
case TRUEPHY_ADV_DUPLEX_NONE:
|
|
/* Duplex already cleared, do nothing */
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_FULL:
|
|
/* Set Bit 9 */
|
|
data |= 0x0200;
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_HALF:
|
|
/* Set Bit 8 */
|
|
data |= 0x0100;
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_BOTH:
|
|
default:
|
|
data |= 0x0300;
|
|
break;
|
|
}
|
|
|
|
/* Write back advertisement */
|
|
MiWrite(etdev, PHY_1000_CONTROL, data);
|
|
}
|
|
|
|
void ET1310_PhyAdvertise100BaseT(struct et131x_adapter *etdev,
|
|
uint16_t duplex)
|
|
{
|
|
uint16_t data;
|
|
|
|
/* Read the Autonegotiation Register (10/100) */
|
|
MiRead(etdev, PHY_AUTO_ADVERTISEMENT, &data);
|
|
|
|
/* Clear bits 7,8 */
|
|
data &= ~0x0180;
|
|
|
|
switch (duplex) {
|
|
case TRUEPHY_ADV_DUPLEX_NONE:
|
|
/* Duplex already cleared, do nothing */
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_FULL:
|
|
/* Set Bit 8 */
|
|
data |= 0x0100;
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_HALF:
|
|
/* Set Bit 7 */
|
|
data |= 0x0080;
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_BOTH:
|
|
default:
|
|
/* Set Bits 7,8 */
|
|
data |= 0x0180;
|
|
break;
|
|
}
|
|
|
|
/* Write back advertisement */
|
|
MiWrite(etdev, PHY_AUTO_ADVERTISEMENT, data);
|
|
}
|
|
|
|
void ET1310_PhyAdvertise10BaseT(struct et131x_adapter *etdev,
|
|
uint16_t duplex)
|
|
{
|
|
uint16_t data;
|
|
|
|
/* Read the Autonegotiation Register (10/100) */
|
|
MiRead(etdev, PHY_AUTO_ADVERTISEMENT, &data);
|
|
|
|
/* Clear bits 5,6 */
|
|
data &= ~0x0060;
|
|
|
|
switch (duplex) {
|
|
case TRUEPHY_ADV_DUPLEX_NONE:
|
|
/* Duplex already cleared, do nothing */
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_FULL:
|
|
/* Set Bit 6 */
|
|
data |= 0x0040;
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_HALF:
|
|
/* Set Bit 5 */
|
|
data |= 0x0020;
|
|
break;
|
|
|
|
case TRUEPHY_ADV_DUPLEX_BOTH:
|
|
default:
|
|
/* Set Bits 5,6 */
|
|
data |= 0x0060;
|
|
break;
|
|
}
|
|
|
|
/* Write back advertisement */
|
|
MiWrite(etdev, PHY_AUTO_ADVERTISEMENT, data);
|
|
}
|
|
|
|
void ET1310_PhyLinkStatus(struct et131x_adapter *etdev,
|
|
uint8_t *link_status,
|
|
uint32_t *autoneg,
|
|
uint32_t *linkspeed,
|
|
uint32_t *duplex_mode,
|
|
uint32_t *mdi_mdix,
|
|
uint32_t *masterslave, uint32_t *polarity)
|
|
{
|
|
uint16_t mistatus = 0;
|
|
uint16_t is1000BaseT = 0;
|
|
uint16_t vmi_phystatus = 0;
|
|
uint16_t control = 0;
|
|
|
|
MiRead(etdev, PHY_STATUS, &mistatus);
|
|
MiRead(etdev, PHY_1000_STATUS, &is1000BaseT);
|
|
MiRead(etdev, PHY_PHY_STATUS, &vmi_phystatus);
|
|
MiRead(etdev, PHY_CONTROL, &control);
|
|
|
|
if (link_status) {
|
|
*link_status =
|
|
(unsigned char)((vmi_phystatus & 0x0040) ? 1 : 0);
|
|
}
|
|
|
|
if (autoneg) {
|
|
*autoneg =
|
|
(control & 0x1000) ? ((vmi_phystatus & 0x0020) ?
|
|
TRUEPHY_ANEG_COMPLETE :
|
|
TRUEPHY_ANEG_NOT_COMPLETE) :
|
|
TRUEPHY_ANEG_DISABLED;
|
|
}
|
|
|
|
if (linkspeed)
|
|
*linkspeed = (vmi_phystatus & 0x0300) >> 8;
|
|
|
|
if (duplex_mode)
|
|
*duplex_mode = (vmi_phystatus & 0x0080) >> 7;
|
|
|
|
if (mdi_mdix)
|
|
/* NOTE: Need to complete this */
|
|
*mdi_mdix = 0;
|
|
|
|
if (masterslave) {
|
|
*masterslave =
|
|
(is1000BaseT & 0x4000) ? TRUEPHY_CFG_MASTER :
|
|
TRUEPHY_CFG_SLAVE;
|
|
}
|
|
|
|
if (polarity) {
|
|
*polarity =
|
|
(vmi_phystatus & 0x0400) ? TRUEPHY_POLARITY_INVERTED :
|
|
TRUEPHY_POLARITY_NORMAL;
|
|
}
|
|
}
|
|
|
|
void ET1310_PhyAndOrReg(struct et131x_adapter *etdev,
|
|
uint16_t regnum, uint16_t andMask, uint16_t orMask)
|
|
{
|
|
uint16_t reg;
|
|
|
|
/* Read the requested register */
|
|
MiRead(etdev, regnum, ®);
|
|
|
|
/* Apply the AND mask */
|
|
reg &= andMask;
|
|
|
|
/* Apply the OR mask */
|
|
reg |= orMask;
|
|
|
|
/* Write the value back to the register */
|
|
MiWrite(etdev, regnum, reg);
|
|
}
|
|
|
|
void ET1310_PhyAccessMiBit(struct et131x_adapter *etdev, uint16_t action,
|
|
uint16_t regnum, uint16_t bitnum, uint8_t *value)
|
|
{
|
|
uint16_t reg;
|
|
uint16_t mask = 0;
|
|
|
|
/* Create a mask to isolate the requested bit */
|
|
mask = 0x0001 << bitnum;
|
|
|
|
/* Read the requested register */
|
|
MiRead(etdev, regnum, ®);
|
|
|
|
switch (action) {
|
|
case TRUEPHY_BIT_READ:
|
|
if (value != NULL)
|
|
*value = (reg & mask) >> bitnum;
|
|
break;
|
|
|
|
case TRUEPHY_BIT_SET:
|
|
reg |= mask;
|
|
MiWrite(etdev, regnum, reg);
|
|
break;
|
|
|
|
case TRUEPHY_BIT_CLEAR:
|
|
reg &= ~mask;
|
|
MiWrite(etdev, regnum, reg);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|