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3aa551c9b4
Add support for threaded interrupt handlers: A device driver can request that its main interrupt handler runs in a thread. To achive this the device driver requests the interrupt with request_threaded_irq() and provides additionally to the handler a thread function. The handler function is called in hard interrupt context and needs to check whether the interrupt originated from the device. If the interrupt originated from the device then the handler can either return IRQ_HANDLED or IRQ_WAKE_THREAD. IRQ_HANDLED is returned when no further action is required. IRQ_WAKE_THREAD causes the genirq code to invoke the threaded (main) handler. When IRQ_WAKE_THREAD is returned handler must have disabled the interrupt on the device level. This is mandatory for shared interrupt handlers, but we need to do it as well for obscure x86 hardware where disabling an interrupt on the IO_APIC level redirects the interrupt to the legacy PIC interrupt lines. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
183 lines
4.9 KiB
C
183 lines
4.9 KiB
C
#ifndef LINUX_HARDIRQ_H
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#define LINUX_HARDIRQ_H
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#include <linux/preempt.h>
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#include <linux/smp_lock.h>
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#include <linux/lockdep.h>
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#include <linux/ftrace_irq.h>
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#include <asm/hardirq.h>
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#include <asm/system.h>
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/*
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* We put the hardirq and softirq counter into the preemption
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* counter. The bitmask has the following meaning:
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*
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* - bits 0-7 are the preemption count (max preemption depth: 256)
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* - bits 8-15 are the softirq count (max # of softirqs: 256)
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*
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* The hardirq count can be overridden per architecture, the default is:
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*
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* - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
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* - ( bit 28 is the PREEMPT_ACTIVE flag. )
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*
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* PREEMPT_MASK: 0x000000ff
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* SOFTIRQ_MASK: 0x0000ff00
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* HARDIRQ_MASK: 0x0fff0000
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*/
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#define PREEMPT_BITS 8
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#define SOFTIRQ_BITS 8
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#ifndef HARDIRQ_BITS
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#define HARDIRQ_BITS 12
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#ifndef MAX_HARDIRQS_PER_CPU
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#define MAX_HARDIRQS_PER_CPU NR_IRQS
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#endif
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/*
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* The hardirq mask has to be large enough to have space for potentially
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* all IRQ sources in the system nesting on a single CPU.
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*/
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#if (1 << HARDIRQ_BITS) < MAX_HARDIRQS_PER_CPU
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# error HARDIRQ_BITS is too low!
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#endif
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#endif
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#define PREEMPT_SHIFT 0
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#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
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#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
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#define __IRQ_MASK(x) ((1UL << (x))-1)
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#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
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#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
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#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
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#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
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#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
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#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
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#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
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#error PREEMPT_ACTIVE is too low!
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#endif
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#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
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#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
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#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
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/*
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* Are we doing bottom half or hardware interrupt processing?
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* Are we in a softirq context? Interrupt context?
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*/
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#define in_irq() (hardirq_count())
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#define in_softirq() (softirq_count())
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#define in_interrupt() (irq_count())
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#if defined(CONFIG_PREEMPT)
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# define PREEMPT_INATOMIC_BASE kernel_locked()
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# define PREEMPT_CHECK_OFFSET 1
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#else
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# define PREEMPT_INATOMIC_BASE 0
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# define PREEMPT_CHECK_OFFSET 0
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#endif
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/*
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* Are we running in atomic context? WARNING: this macro cannot
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* always detect atomic context; in particular, it cannot know about
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* held spinlocks in non-preemptible kernels. Thus it should not be
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* used in the general case to determine whether sleeping is possible.
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* Do not use in_atomic() in driver code.
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*/
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#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)
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/*
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* Check whether we were atomic before we did preempt_disable():
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* (used by the scheduler, *after* releasing the kernel lock)
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*/
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#define in_atomic_preempt_off() \
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((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
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#ifdef CONFIG_PREEMPT
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# define preemptible() (preempt_count() == 0 && !irqs_disabled())
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# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
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#else
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# define preemptible() 0
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# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
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#endif
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#if defined(CONFIG_SMP) || defined(CONFIG_GENERIC_HARDIRQS)
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extern void synchronize_irq(unsigned int irq);
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#else
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# define synchronize_irq(irq) barrier()
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#endif
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struct task_struct;
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#ifndef CONFIG_VIRT_CPU_ACCOUNTING
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static inline void account_system_vtime(struct task_struct *tsk)
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{
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}
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#endif
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#if defined(CONFIG_NO_HZ) && !defined(CONFIG_CLASSIC_RCU)
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extern void rcu_irq_enter(void);
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extern void rcu_irq_exit(void);
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extern void rcu_nmi_enter(void);
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extern void rcu_nmi_exit(void);
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#else
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# define rcu_irq_enter() do { } while (0)
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# define rcu_irq_exit() do { } while (0)
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# define rcu_nmi_enter() do { } while (0)
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# define rcu_nmi_exit() do { } while (0)
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#endif /* #if defined(CONFIG_NO_HZ) && !defined(CONFIG_CLASSIC_RCU) */
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/*
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* It is safe to do non-atomic ops on ->hardirq_context,
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* because NMI handlers may not preempt and the ops are
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* always balanced, so the interrupted value of ->hardirq_context
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* will always be restored.
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*/
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#define __irq_enter() \
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do { \
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account_system_vtime(current); \
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add_preempt_count(HARDIRQ_OFFSET); \
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trace_hardirq_enter(); \
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} while (0)
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/*
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* Enter irq context (on NO_HZ, update jiffies):
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*/
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extern void irq_enter(void);
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/*
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* Exit irq context without processing softirqs:
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*/
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#define __irq_exit() \
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do { \
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trace_hardirq_exit(); \
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account_system_vtime(current); \
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sub_preempt_count(HARDIRQ_OFFSET); \
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} while (0)
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/*
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* Exit irq context and process softirqs if needed:
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*/
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extern void irq_exit(void);
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#define nmi_enter() \
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do { \
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ftrace_nmi_enter(); \
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lockdep_off(); \
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rcu_nmi_enter(); \
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__irq_enter(); \
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} while (0)
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#define nmi_exit() \
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do { \
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__irq_exit(); \
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rcu_nmi_exit(); \
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lockdep_on(); \
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ftrace_nmi_exit(); \
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} while (0)
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#endif /* LINUX_HARDIRQ_H */
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