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![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
353 lines
8.7 KiB
C
353 lines
8.7 KiB
C
/*
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* Intel 82860 Memory Controller kernel module
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* (C) 2005 Red Hat (http://www.redhat.com)
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* This file may be distributed under the terms of the
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* GNU General Public License.
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*
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* Written by Ben Woodard <woodard@redhat.com>
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* shamelessly copied from and based upon the edac_i82875 driver
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* by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define I82860_REVISION " Ver: 2.0.2 " __DATE__
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#define EDAC_MOD_STR "i82860_edac"
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#define i82860_printk(level, fmt, arg...) \
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edac_printk(level, "i82860", fmt, ##arg)
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#define i82860_mc_printk(mci, level, fmt, arg...) \
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edac_mc_chipset_printk(mci, level, "i82860", fmt, ##arg)
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#ifndef PCI_DEVICE_ID_INTEL_82860_0
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#define PCI_DEVICE_ID_INTEL_82860_0 0x2531
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#endif /* PCI_DEVICE_ID_INTEL_82860_0 */
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#define I82860_MCHCFG 0x50
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#define I82860_GBA 0x60
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#define I82860_GBA_MASK 0x7FF
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#define I82860_GBA_SHIFT 24
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#define I82860_ERRSTS 0xC8
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#define I82860_EAP 0xE4
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#define I82860_DERRCTL_STS 0xE2
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enum i82860_chips {
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I82860 = 0,
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};
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struct i82860_dev_info {
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const char *ctl_name;
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};
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struct i82860_error_info {
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u16 errsts;
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u32 eap;
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u16 derrsyn;
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u16 errsts2;
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};
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static const struct i82860_dev_info i82860_devs[] = {
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[I82860] = {
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.ctl_name = "i82860"},
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};
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static struct pci_dev *mci_pdev; /* init dev: in case that AGP code
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* has already registered driver
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*/
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static struct edac_pci_ctl_info *i82860_pci;
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static void i82860_get_error_info(struct mem_ctl_info *mci,
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struct i82860_error_info *info)
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{
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struct pci_dev *pdev;
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pdev = to_pci_dev(mci->dev);
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/*
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* This is a mess because there is no atomic way to read all the
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* registers at once and the registers can transition from CE being
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* overwritten by UE.
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*/
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pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts);
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pci_read_config_dword(pdev, I82860_EAP, &info->eap);
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pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
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pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts2);
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pci_write_bits16(pdev, I82860_ERRSTS, 0x0003, 0x0003);
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/*
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* If the error is the same for both reads then the first set of reads
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* is valid. If there is a change then there is a CE no info and the
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* second set of reads is valid and should be UE info.
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*/
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if (!(info->errsts2 & 0x0003))
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return;
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if ((info->errsts ^ info->errsts2) & 0x0003) {
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pci_read_config_dword(pdev, I82860_EAP, &info->eap);
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pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
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}
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}
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static int i82860_process_error_info(struct mem_ctl_info *mci,
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struct i82860_error_info *info,
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int handle_errors)
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{
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int row;
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if (!(info->errsts2 & 0x0003))
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return 0;
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if (!handle_errors)
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return 1;
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if ((info->errsts ^ info->errsts2) & 0x0003) {
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edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
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info->errsts = info->errsts2;
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}
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info->eap >>= PAGE_SHIFT;
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row = edac_mc_find_csrow_by_page(mci, info->eap);
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if (info->errsts & 0x0002)
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edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE");
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else
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edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row, 0,
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"i82860 UE");
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return 1;
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}
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static void i82860_check(struct mem_ctl_info *mci)
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{
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struct i82860_error_info info;
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debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
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i82860_get_error_info(mci, &info);
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i82860_process_error_info(mci, &info, 1);
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}
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static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
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{
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unsigned long last_cumul_size;
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u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
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u16 value;
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u32 cumul_size;
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struct csrow_info *csrow;
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int index;
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pci_read_config_word(pdev, I82860_MCHCFG, &mchcfg_ddim);
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mchcfg_ddim = mchcfg_ddim & 0x180;
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last_cumul_size = 0;
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/* The group row boundary (GRA) reg values are boundary address
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* for each DRAM row with a granularity of 16MB. GRA regs are
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* cumulative; therefore GRA15 will contain the total memory contained
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* in all eight rows.
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*/
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for (index = 0; index < mci->nr_csrows; index++) {
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csrow = &mci->csrows[index];
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pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
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cumul_size = (value & I82860_GBA_MASK) <<
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(I82860_GBA_SHIFT - PAGE_SHIFT);
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debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
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cumul_size);
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if (cumul_size == last_cumul_size)
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continue; /* not populated */
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csrow->first_page = last_cumul_size;
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csrow->last_page = cumul_size - 1;
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csrow->nr_pages = cumul_size - last_cumul_size;
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last_cumul_size = cumul_size;
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csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
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csrow->mtype = MEM_RMBS;
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csrow->dtype = DEV_UNKNOWN;
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csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
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}
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}
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static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
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{
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struct mem_ctl_info *mci;
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struct i82860_error_info discard;
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/* RDRAM has channels but these don't map onto the abstractions that
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edac uses.
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The device groups from the GRA registers seem to map reasonably
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well onto the notion of a chip select row.
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There are 16 GRA registers and since the name is associated with
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the channel and the GRA registers map to physical devices so we are
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going to make 1 channel for group.
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*/
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mci = edac_mc_alloc(0, 16, 1, 0);
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if (!mci)
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return -ENOMEM;
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debugf3("%s(): init mci\n", __func__);
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mci->dev = &pdev->dev;
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mci->mtype_cap = MEM_FLAG_DDR;
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mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
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/* I"m not sure about this but I think that all RDRAM is SECDED */
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mci->edac_cap = EDAC_FLAG_SECDED;
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mci->mod_name = EDAC_MOD_STR;
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mci->mod_ver = I82860_REVISION;
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mci->ctl_name = i82860_devs[dev_idx].ctl_name;
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mci->dev_name = pci_name(pdev);
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mci->edac_check = i82860_check;
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mci->ctl_page_to_phys = NULL;
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i82860_init_csrows(mci, pdev);
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i82860_get_error_info(mci, &discard); /* clear counters */
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/* Here we assume that we will never see multiple instances of this
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* type of memory controller. The ID is therefore hardcoded to 0.
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*/
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if (edac_mc_add_mc(mci)) {
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debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
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goto fail;
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}
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/* allocating generic PCI control info */
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i82860_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
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if (!i82860_pci) {
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printk(KERN_WARNING
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"%s(): Unable to create PCI control\n",
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__func__);
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printk(KERN_WARNING
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"%s(): PCI error report via EDAC not setup\n",
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__func__);
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}
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/* get this far and it's successful */
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debugf3("%s(): success\n", __func__);
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return 0;
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fail:
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edac_mc_free(mci);
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return -ENODEV;
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}
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/* returns count (>= 0), or negative on error */
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static int __devinit i82860_init_one(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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int rc;
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debugf0("%s()\n", __func__);
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i82860_printk(KERN_INFO, "i82860 init one\n");
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if (pci_enable_device(pdev) < 0)
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return -EIO;
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rc = i82860_probe1(pdev, ent->driver_data);
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if (rc == 0)
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mci_pdev = pci_dev_get(pdev);
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return rc;
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}
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static void __devexit i82860_remove_one(struct pci_dev *pdev)
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{
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struct mem_ctl_info *mci;
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debugf0("%s()\n", __func__);
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if (i82860_pci)
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edac_pci_release_generic_ctl(i82860_pci);
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if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
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return;
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edac_mc_free(mci);
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}
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static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
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{
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PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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I82860},
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{
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0,
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} /* 0 terminated list. */
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};
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MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
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static struct pci_driver i82860_driver = {
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.name = EDAC_MOD_STR,
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.probe = i82860_init_one,
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.remove = __devexit_p(i82860_remove_one),
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.id_table = i82860_pci_tbl,
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};
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static int __init i82860_init(void)
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{
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int pci_rc;
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debugf3("%s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
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goto fail0;
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if (!mci_pdev) {
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mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82860_0, NULL);
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if (mci_pdev == NULL) {
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debugf0("860 pci_get_device fail\n");
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pci_rc = -ENODEV;
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goto fail1;
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}
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pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
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if (pci_rc < 0) {
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debugf0("860 init fail\n");
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pci_rc = -ENODEV;
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goto fail1;
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}
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}
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return 0;
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fail1:
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pci_unregister_driver(&i82860_driver);
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fail0:
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if (mci_pdev != NULL)
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pci_dev_put(mci_pdev);
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return pci_rc;
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}
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static void __exit i82860_exit(void)
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{
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debugf3("%s()\n", __func__);
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pci_unregister_driver(&i82860_driver);
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if (mci_pdev != NULL)
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pci_dev_put(mci_pdev);
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}
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module_init(i82860_init);
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module_exit(i82860_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) "
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"Ben Woodard <woodard@redhat.com>");
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MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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