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7c0edad364
Managing possible CPUs is an unreadable and uncomprehensible maze. Aside of
that it's backwards because it applies command line limits after
registering all APICs.
Rewrite it so that it:
- Applies the command line limits upfront so that only the allowed amount
of APIC IDs can be registered.
- Applies eventual late restrictions in an understandable way
- Uses simple min_t() calculations which are trivial to follow.
- Provides a separate function for resetting to UP mode late in the
bringup process.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michael Kelley <mhklinux@outlook.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Link: https://lore.kernel.org/r/20240213210252.290098853@linutronix.de
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CPU_H
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#define _ASM_X86_CPU_H
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#include <linux/device.h>
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#include <linux/cpu.h>
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#include <linux/topology.h>
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#include <linux/nodemask.h>
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#include <linux/percpu.h>
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#include <asm/ibt.h>
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#ifndef CONFIG_SMP
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#define cpu_physical_id(cpu) boot_cpu_physical_apicid
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#define cpu_acpi_id(cpu) 0
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#define safe_smp_processor_id() 0
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_HOTPLUG_CPU
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extern void soft_restart_cpu(void);
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#endif
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extern void ap_init_aperfmperf(void);
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int mwait_usable(const struct cpuinfo_x86 *);
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unsigned int x86_family(unsigned int sig);
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unsigned int x86_model(unsigned int sig);
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unsigned int x86_stepping(unsigned int sig);
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#ifdef CONFIG_CPU_SUP_INTEL
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extern void __init sld_setup(struct cpuinfo_x86 *c);
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extern bool handle_user_split_lock(struct pt_regs *regs, long error_code);
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extern bool handle_guest_split_lock(unsigned long ip);
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extern void handle_bus_lock(struct pt_regs *regs);
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u8 get_this_hybrid_cpu_type(void);
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#else
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static inline void __init sld_setup(struct cpuinfo_x86 *c) {}
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static inline bool handle_user_split_lock(struct pt_regs *regs, long error_code)
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{
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return false;
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}
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static inline bool handle_guest_split_lock(unsigned long ip)
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{
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return false;
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}
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static inline void handle_bus_lock(struct pt_regs *regs) {}
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static inline u8 get_this_hybrid_cpu_type(void)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_IA32_FEAT_CTL
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void init_ia32_feat_ctl(struct cpuinfo_x86 *c);
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#else
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static inline void init_ia32_feat_ctl(struct cpuinfo_x86 *c) {}
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#endif
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extern __noendbr void cet_disable(void);
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struct cpu_signature;
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void intel_collect_cpu_info(struct cpu_signature *sig);
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extern u64 x86_read_arch_cap_msr(void);
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bool intel_find_matching_signature(void *mc, struct cpu_signature *sig);
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int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type);
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extern struct cpumask cpus_stop_mask;
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#endif /* _ASM_X86_CPU_H */
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