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4d5e68330d
Instead of allocating yet another data structure, move the clock event data into the channel structure. This allows further consolidation of the reservation code and the reuse of the cached boot config to replace the extra flags in the clockevent data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Cc: Ashok Raj <ashok.raj@intel.com> Cc: Andi Kleen <andi.kleen@intel.com> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Stephane Eranian <eranian@google.com> Cc: Ravi Shankar <ravi.v.shankar@intel.com> Link: https://lkml.kernel.org/r/20190623132436.185851116@linutronix.de
114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_HPET_H
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#define _ASM_X86_HPET_H
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#include <linux/msi.h>
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#ifdef CONFIG_HPET_TIMER
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#define HPET_MMAP_SIZE 1024
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#define HPET_ID 0x000
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#define HPET_PERIOD 0x004
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#define HPET_CFG 0x010
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#define HPET_STATUS 0x020
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#define HPET_COUNTER 0x0f0
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#define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
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#define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
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#define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
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#define HPET_T0_CFG 0x100
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#define HPET_T0_CMP 0x108
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#define HPET_T0_ROUTE 0x110
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#define HPET_T1_CFG 0x120
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#define HPET_T1_CMP 0x128
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#define HPET_T1_ROUTE 0x130
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#define HPET_T2_CFG 0x140
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#define HPET_T2_CMP 0x148
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#define HPET_T2_ROUTE 0x150
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#define HPET_ID_REV 0x000000ff
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#define HPET_ID_NUMBER 0x00001f00
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#define HPET_ID_64BIT 0x00002000
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#define HPET_ID_LEGSUP 0x00008000
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#define HPET_ID_VENDOR 0xffff0000
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#define HPET_ID_NUMBER_SHIFT 8
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#define HPET_ID_VENDOR_SHIFT 16
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#define HPET_CFG_ENABLE 0x001
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#define HPET_CFG_LEGACY 0x002
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#define HPET_LEGACY_8254 2
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#define HPET_LEGACY_RTC 8
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#define HPET_TN_LEVEL 0x0002
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#define HPET_TN_ENABLE 0x0004
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#define HPET_TN_PERIODIC 0x0008
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#define HPET_TN_PERIODIC_CAP 0x0010
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#define HPET_TN_64BIT_CAP 0x0020
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#define HPET_TN_SETVAL 0x0040
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#define HPET_TN_32BIT 0x0100
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#define HPET_TN_ROUTE 0x3e00
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#define HPET_TN_FSB 0x4000
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#define HPET_TN_FSB_CAP 0x8000
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#define HPET_TN_ROUTE_SHIFT 9
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/* Max HPET Period is 10^8 femto sec as in HPET spec */
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#define HPET_MAX_PERIOD 100000000UL
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/*
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* Min HPET period is 10^5 femto sec just for safety. If it is less than this,
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* then 32 bit HPET counter wrapsaround in less than 0.5 sec.
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*/
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#define HPET_MIN_PERIOD 100000UL
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/* hpet memory map physical address */
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extern unsigned long hpet_address;
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extern unsigned long force_hpet_address;
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extern bool boot_hpet_disable;
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extern u8 hpet_blockid;
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extern bool hpet_force_user;
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extern bool hpet_msi_disable;
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extern int is_hpet_enabled(void);
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extern int hpet_enable(void);
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extern void hpet_disable(void);
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extern unsigned int hpet_readl(unsigned int a);
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extern void force_hpet_resume(void);
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struct irq_data;
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struct hpet_channel;
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struct irq_domain;
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extern void hpet_msi_unmask(struct irq_data *data);
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extern void hpet_msi_mask(struct irq_data *data);
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extern void hpet_msi_write(struct hpet_channel *hc, struct msi_msg *msg);
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extern struct irq_domain *hpet_create_irq_domain(int hpet_id);
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extern int hpet_assign_irq(struct irq_domain *domain,
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struct hpet_channel *hc, int dev_num);
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#ifdef CONFIG_HPET_EMULATE_RTC
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#include <linux/interrupt.h>
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typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
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extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
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unsigned char sec);
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extern int hpet_set_periodic_freq(unsigned long freq);
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extern int hpet_rtc_dropped_irq(void);
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extern int hpet_rtc_timer_init(void);
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extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
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extern int hpet_register_irq_handler(rtc_irq_handler handler);
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extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
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#endif /* CONFIG_HPET_EMULATE_RTC */
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#else /* CONFIG_HPET_TIMER */
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static inline int hpet_enable(void) { return 0; }
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static inline int is_hpet_enabled(void) { return 0; }
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#define hpet_readl(a) 0
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#define default_setup_hpet_msi NULL
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#endif
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#endif /* _ASM_X86_HPET_H */
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