mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 01:10:04 +00:00
![Arnd Bergmann](/assets/img/avatar_default.png)
The x86 platform operations are fairly isolated, so it's easy to change them from using timespec to timespec64. It has been checked that all the users and callers are safe, and there is only one critical function that is broken beyond 2106: pvclock_read_wallclock() uses a 32-bit number of seconds since the epoch to communicate the boot time between host and guest in a virtual environment. This will work until 2106, but fixing this is outside the scope of this change, Add a comment at least. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Acked-by: Radim Krčmář <rkrcmar@redhat.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Cc: Juergen Gross <jgross@suse.com> Cc: jailhouse-dev@googlegroups.com Cc: Borislav Petkov <bp@suse.de> Cc: kvm@vger.kernel.org Cc: y2038@lists.linaro.org Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: xen-devel@lists.xenproject.org Cc: John Stultz <john.stultz@linaro.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Joao Martins <joao.m.martins@oracle.com> Link: https://lkml.kernel.org/r/20180427201435.3194219-1-arnd@arndb.de
103 lines
2.8 KiB
C
103 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Machine dependent access functions for RTC registers.
|
|
*/
|
|
#ifndef _ASM_X86_MC146818RTC_H
|
|
#define _ASM_X86_MC146818RTC_H
|
|
|
|
#include <asm/io.h>
|
|
#include <asm/processor.h>
|
|
|
|
#ifndef RTC_PORT
|
|
#define RTC_PORT(x) (0x70 + (x))
|
|
#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
|
|
#endif
|
|
|
|
#if defined(CONFIG_X86_32)
|
|
/*
|
|
* This lock provides nmi access to the CMOS/RTC registers. It has some
|
|
* special properties. It is owned by a CPU and stores the index register
|
|
* currently being accessed (if owned). The idea here is that it works
|
|
* like a normal lock (normally). However, in an NMI, the NMI code will
|
|
* first check to see if its CPU owns the lock, meaning that the NMI
|
|
* interrupted during the read/write of the device. If it does, it goes ahead
|
|
* and performs the access and then restores the index register. If it does
|
|
* not, it locks normally.
|
|
*
|
|
* Note that since we are working with NMIs, we need this lock even in
|
|
* a non-SMP machine just to mark that the lock is owned.
|
|
*
|
|
* This only works with compare-and-swap. There is no other way to
|
|
* atomically claim the lock and set the owner.
|
|
*/
|
|
#include <linux/smp.h>
|
|
extern volatile unsigned long cmos_lock;
|
|
|
|
/*
|
|
* All of these below must be called with interrupts off, preempt
|
|
* disabled, etc.
|
|
*/
|
|
|
|
static inline void lock_cmos(unsigned char reg)
|
|
{
|
|
unsigned long new;
|
|
new = ((smp_processor_id() + 1) << 8) | reg;
|
|
for (;;) {
|
|
if (cmos_lock) {
|
|
cpu_relax();
|
|
continue;
|
|
}
|
|
if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
|
|
return;
|
|
}
|
|
}
|
|
|
|
static inline void unlock_cmos(void)
|
|
{
|
|
cmos_lock = 0;
|
|
}
|
|
|
|
static inline int do_i_have_lock_cmos(void)
|
|
{
|
|
return (cmos_lock >> 8) == (smp_processor_id() + 1);
|
|
}
|
|
|
|
static inline unsigned char current_lock_cmos_reg(void)
|
|
{
|
|
return cmos_lock & 0xff;
|
|
}
|
|
|
|
#define lock_cmos_prefix(reg) \
|
|
do { \
|
|
unsigned long cmos_flags; \
|
|
local_irq_save(cmos_flags); \
|
|
lock_cmos(reg)
|
|
|
|
#define lock_cmos_suffix(reg) \
|
|
unlock_cmos(); \
|
|
local_irq_restore(cmos_flags); \
|
|
} while (0)
|
|
#else
|
|
#define lock_cmos_prefix(reg) do {} while (0)
|
|
#define lock_cmos_suffix(reg) do {} while (0)
|
|
#define lock_cmos(reg) do { } while (0)
|
|
#define unlock_cmos() do { } while (0)
|
|
#define do_i_have_lock_cmos() 0
|
|
#define current_lock_cmos_reg() 0
|
|
#endif
|
|
|
|
/*
|
|
* The yet supported machines all access the RTC index register via
|
|
* an ISA port access but the way to access the date register differs ...
|
|
*/
|
|
#define CMOS_READ(addr) rtc_cmos_read(addr)
|
|
#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
|
|
unsigned char rtc_cmos_read(unsigned char addr);
|
|
void rtc_cmos_write(unsigned char val, unsigned char addr);
|
|
|
|
extern int mach_set_rtc_mmss(const struct timespec64 *now);
|
|
extern void mach_get_cmos_time(struct timespec64 *now);
|
|
|
|
#define RTC_IRQ 8
|
|
|
|
#endif /* _ASM_X86_MC146818RTC_H */
|