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![Ingo Molnar](/assets/img/avatar_default.png)
- Untangle the somewhat incestous way of how VMALLOC_START is used all across the kernel, but is, on x86, defined deep inside one of the lowest level page table headers. It doesn't help that vmalloc.h only includes a single asm header: #include <asm/page.h> /* pgprot_t */ So there was no existing cross-arch way to decouple address layout definitions from page.h details. I used this: #ifndef VMALLOC_START # include <asm/vmalloc.h> #endif This way every architecture that wants to simplify page.h can do so. - Also on x86 we had a couple of LDT related inline functions that used the late-stage address space layout positions - but these could be uninlined without real trouble - the end result is cleaner this way as well. Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Rik van Riel <riel@redhat.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mm@kvack.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
23 lines
634 B
C
23 lines
634 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_PGTABLE_32_TYPES_H
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#define _ASM_X86_PGTABLE_32_TYPES_H
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/*
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* The Linux x86 paging architecture is 'compile-time dual-mode', it
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* implements both the traditional 2-level x86 page tables and the
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* newer 3-level PAE-mode page tables.
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*/
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#ifdef CONFIG_X86_PAE
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# include <asm/pgtable-3level_types.h>
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# define PMD_SIZE (1UL << PMD_SHIFT)
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# define PMD_MASK (~(PMD_SIZE - 1))
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#else
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# include <asm/pgtable-2level_types.h>
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#endif
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#define pgtable_l5_enabled() 0
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE - 1))
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#endif /* _ASM_X86_PGTABLE_32_TYPES_H */
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