Kirill A. Shutemov cde700ceb0 x86/tdx: Allow 32-bit emulation by default ... [ upstream commit f4116bfc44 ] 32-bit emulation was disabled on TDX to prevent a possible attack by a VMM injecting an interrupt on vector 0x80. Now that int80_emulation() has a check for external interrupts the limitation can be lifted. To distinguish software interrupts from external ones, int80_emulation() checks the APIC ISR bit relevant to the 0x80 vector. For software interrupts, this bit will be 0. On TDX, the VAPIC state (including ISR) is protected and cannot be manipulated by the VMM. The ISR bit is set by the microcode flow during the handling of posted interrupts. [ dhansen: more changelog tweaks ] Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: <stable@vger.kernel.org> # v6.0+ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2023-12-13 18:39:05 +01:00
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alpha
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arm	xen: simplify evtchn_do_upcall() call maze	2023-12-08 08:51:20 +01:00
arm64	arm64: dts: imx8mn-var-som: add 20ms delay to ethernet regulator enable	2023-12-03 07:32:11 +01:00
csky
hexagon
ia64
loongarch	LoongArch: Mark __percpu functions as always inline	2023-11-28 17:07:19 +00:00
m68k
microblaze
mips	MIPS: KVM: Fix a build warning about variable set but not used	2023-12-03 07:32:09 +01:00
nios2
openrisc
parisc	parisc: Mark altinstructions read-only and 32-bit aligned	2023-12-08 08:51:16 +01:00
powerpc	powerpc: Don't clobber f0/vs0 during fp|altivec register save	2023-12-08 08:51:15 +01:00
riscv	RISC-V: drop error print from riscv_hartid_to_cpuid()	2023-11-28 17:07:23 +00:00
s390	s390/cmma: fix detection of DAT pages	2023-11-28 17:07:14 +00:00
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x86	x86/tdx: Allow 32-bit emulation by default	2023-12-13 18:39:05 +01:00
xtensa
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Kconfig