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8453c5cafd
Before we start removing omap3 legacy booting support, let's make n900 DT booting behave the same way for ir-rx51 as the legacy booting does. For now, we need to pass pdata to the ir-rx51 driver. This means that the n900 tree can move to using DT based booting without having to carry all the legacy platform data with it when it gets dropped from the mainline tree. Note that the ir-rx51 driver is currently disabled because of the dependency to !ARCH_MULTIPLATFORM. This will get sorted out later with the help of drivers/pwm/pwm-omap-dmtimer.c. But first we need to add chained IRQ support to dmtimer code to avoid introducing new custom frameworks. So let's just pass the necessary dmtimer functions to ir-rx51 so we can get it working in the following patch. Cc: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
90 lines
3.3 KiB
C
90 lines
3.3 KiB
C
/*
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* include/linux/platform_data/pwm_omap_dmtimer.h
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*
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* OMAP Dual-Mode Timer PWM platform data
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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* Tarun Kanti DebBarma <tarun.kanti@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* Platform device conversion and hwmod support.
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*
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* Copyright (C) 2005 Nokia Corporation
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* Author: Lauri Leukkunen <lauri.leukkunen@nokia.com>
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* PWM and clock framework support by Timo Teras.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __PWM_OMAP_DMTIMER_PDATA_H
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#define __PWM_OMAP_DMTIMER_PDATA_H
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/* clock sources */
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#define PWM_OMAP_DMTIMER_SRC_SYS_CLK 0x00
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#define PWM_OMAP_DMTIMER_SRC_32_KHZ 0x01
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#define PWM_OMAP_DMTIMER_SRC_EXT_CLK 0x02
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/* timer interrupt enable bits */
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#define PWM_OMAP_DMTIMER_INT_CAPTURE (1 << 2)
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#define PWM_OMAP_DMTIMER_INT_OVERFLOW (1 << 1)
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#define PWM_OMAP_DMTIMER_INT_MATCH (1 << 0)
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/* trigger types */
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#define PWM_OMAP_DMTIMER_TRIGGER_NONE 0x00
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#define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW 0x01
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#define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
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struct omap_dm_timer;
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typedef struct omap_dm_timer pwm_omap_dmtimer;
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struct pwm_omap_dmtimer_pdata {
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pwm_omap_dmtimer *(*request_by_node)(struct device_node *np);
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pwm_omap_dmtimer *(*request_specific)(int timer_id);
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pwm_omap_dmtimer *(*request)(void);
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int (*free)(pwm_omap_dmtimer *timer);
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void (*enable)(pwm_omap_dmtimer *timer);
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void (*disable)(pwm_omap_dmtimer *timer);
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int (*get_irq)(pwm_omap_dmtimer *timer);
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int (*set_int_enable)(pwm_omap_dmtimer *timer, unsigned int value);
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int (*set_int_disable)(pwm_omap_dmtimer *timer, u32 mask);
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struct clk *(*get_fclk)(pwm_omap_dmtimer *timer);
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int (*start)(pwm_omap_dmtimer *timer);
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int (*stop)(pwm_omap_dmtimer *timer);
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int (*set_source)(pwm_omap_dmtimer *timer, int source);
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int (*set_load)(pwm_omap_dmtimer *timer, int autoreload,
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unsigned int value);
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int (*set_match)(pwm_omap_dmtimer *timer, int enable,
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unsigned int match);
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int (*set_pwm)(pwm_omap_dmtimer *timer, int def_on,
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int toggle, int trigger);
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int (*set_prescaler)(pwm_omap_dmtimer *timer, int prescaler);
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unsigned int (*read_counter)(pwm_omap_dmtimer *timer);
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int (*write_counter)(pwm_omap_dmtimer *timer, unsigned int value);
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unsigned int (*read_status)(pwm_omap_dmtimer *timer);
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int (*write_status)(pwm_omap_dmtimer *timer, unsigned int value);
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};
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#endif /* __PWM_OMAP_DMTIMER_PDATA_H */
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