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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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d64420e816
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Acked-by: Robin Murphy <robin.murphy@arm.com>
146 lines
2.8 KiB
Text
146 lines
2.8 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "rk3368-lion.dtsi"
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/ {
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model = "Theobroma Systems RK3368-uQ7 Baseboard";
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compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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i2cmux2 {
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i2c@0 {
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eeprom: eeprom@50 {
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compatible = "atmel,24c01";
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pagesize = <8>;
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reg = <0x50>;
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};
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};
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};
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leds {
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pinctrl-0 = <&led_pins_module>, <&led_sd_haikou>;
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sd-card-led {
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label = "sd_card_led";
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gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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};
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc3v3_baseboard: vcc3v3-baseboard {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_baseboard";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&otg_vbus_drv>;
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regulator-name = "vcc5v0_otg";
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regulator-always-on;
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};
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
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disable-wp;
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max-frequency = <25000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
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rockchip,default-sample-phase = <90>;
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vmmc-supply = <&vcc3v3_baseboard>;
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status = "okay";
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};
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&spi2 {
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cs-gpios = <0>, <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
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status = "okay";
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};
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&usb_otg {
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dr_mode = "otg";
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
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status = "okay";
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};
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&uart1 {
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/* alternate function of GPIO5/6 */
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status = "disabled";
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};
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&pinctrl {
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pinctrl-names = "default";
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pinctrl-0 = <&haikou_pin_hog>;
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hog {
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haikou_pin_hog: haikou-pin-hog {
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rockchip,pins =
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/* LID_BTN */
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<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
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/* BATLOW# */
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<0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>,
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/* SLP_BTN# */
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<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
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/* BIOS_DISABLE# */
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<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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leds {
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led_sd_haikou: led-sd-gpio {
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rockchip,pins =
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<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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sdmmc_cd_gpio: sdmmc-cd-gpio {
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rockchip,pins =
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<2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb_otg {
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otg_vbus_drv: otg-vbus-drv {
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rockchip,pins =
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<0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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