linux-stable/arch/arm/boot/dts/rk3288-evb-act8846.dts
Caesar Wang a1c2e133d2 ARM: dts: rockchip: fix voltage ranges for rk3288-evb-act8846 board
In general, the logic voltage is affected by ddr frequency factors.
We should fix the correct voltage range since assuemd that we have the
ddr frequency driver in mainline in the future.

AFAIK, the 1.8v voltage is used by the SD3.0 card.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-11 14:01:13 +01:00

221 lines
5.7 KiB
Text

/*
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* a) This file is free software; you can redistribute it and/or
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*
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*
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/dts-v1/;
#include "rk3288-evb.dtsi"
/ {
compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";
vcc_lcd: vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_en>;
regulator-name = "vcc_lcd";
vin-supply = <&vcc_io>;
};
vcc_wl: vcc-wl {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&wifi_pwr>;
regulator-name = "vcc_wl";
vin-supply = <&vcc_18>;
};
};
&i2c0 {
clock-frequency = <400000>;
vdd_cpu: syr827@40 {
compatible = "silergy,syr827";
fcs,suspend-voltage-selector = <1>;
reg = <0x40>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
vdd_gpu: syr828@41 {
compatible = "silergy,syr828";
fcs,suspend-voltage-selector = <1>;
reg = <0x41>;
regulator-name = "vdd_gpu";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
vin-supply = <&vcc_sys>;
};
hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
interrupt-parent = <&gpio0>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
#clock-cells = <0>;
clock-output-names = "xin32k";
};
act8846: act8846@5a {
compatible = "active-semi,act8846";
reg = <0x5a>;
status = "okay";
vp1-supply = <&vcc_sys>;
vp2-supply = <&vcc_sys>;
vp3-supply = <&vcc_sys>;
vp4-supply = <&vcc_sys>;
inl1-supply = <&vcc_io>;
inl2-supply = <&vcc_sys>;
inl3-supply = <&vcc_20>;
regulators {
vcc_ddr: REG1 {
regulator-name = "VCC_DDR";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vcc_io: REG2 {
regulator-name = "VCC_IO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_log: REG3 {
regulator-name = "VDD_LOG";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
vcc_20: REG4 {
regulator-name = "VCC_20";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
};
vccio_sd: REG5 {
regulator-name = "VCCIO_SD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd10_lcd: REG6 {
regulator-name = "VDD10_LCD";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
vcca_codec: REG7 {
regulator-name = "VCCA_CODEC";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vcc_tp: REG8 {
regulator-name = "VCCA_TP";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vccio_pmu: REG9 {
regulator-name = "VCCIO_PMU";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_10: REG10 {
regulator-name = "VDD_10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
vcc_18: REG11 {
regulator-name = "VCC_18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcc18_lcd: REG12 {
regulator-name = "VCC18_LCD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
};
};
&pinctrl {
lcd {
lcd_en: lcd-en {
rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
wifi_pwr: wifi-pwr {
rockchip,pins = <7 9 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};