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c03b12a68f
When compiling with W=1 enabling -Wmissing-prototypes the compiler warns: arch/openrisc/mm/tlb.c:188:13: error: no previous prototype for 'tlb_init' [-Werror=missing-prototypes] This function is not implemented or used so remove it. Reported-by: Arnd Bergmann <arnd@arndb.de> Closes: https://lore.kernel.org/linux-kernel/20230810141947.1236730-17-arnd@kernel.org/ Signed-off-by: Stafford Horne <shorne@gmail.com>
228 lines
5.7 KiB
C
228 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* OpenRISC idle.c
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* Modifications for the OpenRISC architecture:
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* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/smp.h>
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#include <linux/memblock.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pagemap.h>
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#include <asm/pgalloc.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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#include <asm/tlb.h>
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#include <asm/mmu_context.h>
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#include <asm/fixmap.h>
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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int mem_init_done;
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static void __init zone_sizes_init(void)
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{
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unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };
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/*
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* We use only ZONE_NORMAL
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*/
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max_zone_pfn[ZONE_NORMAL] = max_low_pfn;
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free_area_init(max_zone_pfn);
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}
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extern const char _s_kernel_ro[], _e_kernel_ro[];
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/*
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* Map all physical memory into kernel's address space.
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*
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* This is explicitly coded for two-level page tables, so if you need
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* something else then this needs to change.
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*/
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static void __init map_ram(void)
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{
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phys_addr_t start, end;
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unsigned long v, p, e;
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pgprot_t prot;
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pgd_t *pge;
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p4d_t *p4e;
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pud_t *pue;
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pmd_t *pme;
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pte_t *pte;
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u64 i;
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/* These mark extents of read-only kernel pages...
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* ...from vmlinux.lds.S
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*/
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v = PAGE_OFFSET;
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for_each_mem_range(i, &start, &end) {
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p = (u32) start & PAGE_MASK;
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e = (u32) end;
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v = (u32) __va(p);
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pge = pgd_offset_k(v);
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while (p < e) {
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int j;
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p4e = p4d_offset(pge, v);
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pue = pud_offset(p4e, v);
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pme = pmd_offset(pue, v);
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if ((u32) pue != (u32) pge || (u32) pme != (u32) pge) {
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panic("%s: OR1K kernel hardcoded for "
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"two-level page tables",
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__func__);
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}
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/* Alloc one page for holding PTE's... */
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pte = memblock_alloc_raw(PAGE_SIZE, PAGE_SIZE);
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if (!pte)
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panic("%s: Failed to allocate page for PTEs\n",
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__func__);
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set_pmd(pme, __pmd(_KERNPG_TABLE + __pa(pte)));
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/* Fill the newly allocated page with PTE'S */
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for (j = 0; p < e && j < PTRS_PER_PTE;
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v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) {
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if (v >= (u32) _e_kernel_ro ||
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v < (u32) _s_kernel_ro)
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prot = PAGE_KERNEL;
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else
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prot = PAGE_KERNEL_RO;
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set_pte(pte, mk_pte_phys(p, prot));
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}
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pge++;
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}
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printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
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start, end);
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}
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}
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void __init paging_init(void)
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{
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int i;
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printk(KERN_INFO "Setting up paging and PTEs.\n");
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/* clear out the init_mm.pgd that will contain the kernel's mappings */
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for (i = 0; i < PTRS_PER_PGD; i++)
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swapper_pg_dir[i] = __pgd(0);
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/* make sure the current pgd table points to something sane
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* (even if it is most probably not used until the next
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* switch_mm)
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*/
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current_pgd[smp_processor_id()] = init_mm.pgd;
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map_ram();
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zone_sizes_init();
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/* self modifying code ;) */
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/* Since the old TLB miss handler has been running up until now,
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* the kernel pages are still all RW, so we can still modify the
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* text directly... after this change and a TLB flush, the kernel
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* pages will become RO.
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*/
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{
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extern unsigned long dtlb_miss_handler;
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extern unsigned long itlb_miss_handler;
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unsigned long *dtlb_vector = __va(0x900);
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unsigned long *itlb_vector = __va(0xa00);
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printk(KERN_INFO "itlb_miss_handler %p\n", &itlb_miss_handler);
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*itlb_vector = ((unsigned long)&itlb_miss_handler -
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(unsigned long)itlb_vector) >> 2;
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/* Soft ordering constraint to ensure that dtlb_vector is
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* the last thing updated
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*/
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barrier();
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printk(KERN_INFO "dtlb_miss_handler %p\n", &dtlb_miss_handler);
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*dtlb_vector = ((unsigned long)&dtlb_miss_handler -
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(unsigned long)dtlb_vector) >> 2;
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}
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/* Soft ordering constraint to ensure that cache invalidation and
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* TLB flush really happen _after_ code has been modified.
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*/
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barrier();
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/* Invalidate instruction caches after code modification */
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mtspr(SPR_ICBIR, 0x900);
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mtspr(SPR_ICBIR, 0xa00);
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/* New TLB miss handlers and kernel page tables are in now place.
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* Make sure that page flags get updated for all pages in TLB by
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* flushing the TLB and forcing all TLB entries to be recreated
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* from their page table flags.
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*/
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flush_tlb_all();
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}
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/* References to section boundaries */
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void __init mem_init(void)
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{
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BUG_ON(!mem_map);
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max_mapnr = max_low_pfn;
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high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);
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/* clear the zero-page */
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memset((void *)empty_zero_page, 0, PAGE_SIZE);
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/* this will put all low memory onto the freelists */
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memblock_free_all();
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printk("mem_init_done ...........................................\n");
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mem_init_done = 1;
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return;
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}
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static const pgprot_t protection_map[16] = {
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[VM_NONE] = PAGE_NONE,
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[VM_READ] = PAGE_READONLY_X,
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[VM_WRITE] = PAGE_COPY,
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[VM_WRITE | VM_READ] = PAGE_COPY_X,
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[VM_EXEC] = PAGE_READONLY,
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[VM_EXEC | VM_READ] = PAGE_READONLY_X,
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[VM_EXEC | VM_WRITE] = PAGE_COPY,
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[VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_X,
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[VM_SHARED] = PAGE_NONE,
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[VM_SHARED | VM_READ] = PAGE_READONLY_X,
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[VM_SHARED | VM_WRITE] = PAGE_SHARED,
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[VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED_X,
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[VM_SHARED | VM_EXEC] = PAGE_READONLY,
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[VM_SHARED | VM_EXEC | VM_READ] = PAGE_READONLY_X,
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[VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED,
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[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_X
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};
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DECLARE_VM_GET_PAGE_PROT
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