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a9372a5fb2
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are: * Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes Hard to tell what else is different, because documentation is not available. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
29 lines
708 B
C
29 lines
708 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Marvell MMP3 aka PXA2128 aka 88AP2128 support
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*
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* Copyright (C) 2019 Lubomir Rintel <lkundrak@v3.sk>
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*/
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <linux/of_platform.h>
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#include <linux/clk-provider.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "common.h"
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static const char *const mmp3_dt_board_compat[] __initconst = {
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"marvell,mmp3",
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NULL,
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};
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DT_MACHINE_START(MMP2_DT, "Marvell MMP3")
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.map_io = mmp2_map_io,
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.dt_compat = mmp3_dt_board_compat,
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.l2c_aux_val = 1 << L310_AUX_CTRL_FWA_SHIFT |
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L310_AUX_CTRL_DATA_PREFETCH |
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L310_AUX_CTRL_INSTR_PREFETCH,
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.l2c_aux_mask = 0xc20fffff,
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MACHINE_END
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