linux-stable/include/memory/renesas-rpc-if.h
Geert Uytterhoeven 72e7940b00 memory: renesas-rpc-if: Fix HF/OSPI data transfer in Manual Mode
[ Upstream commit 7e842d70fe ]

HyperFlash devices fail to probe:

    rpc-if-hyperflash rpc-if-hyperflash: probing of hyperbus device failed

In HyperFlash or Octal-SPI Flash mode, the Transfer Data Enable bits
(SPIDE) in the Manual Mode Enable Setting Register (SMENR) are derived
from half of the transfer size, cfr. the rpcif_bits_set() helper
function.  However, rpcif_reg_{read,write}() does not take the bus size
into account, and does not double all Manual Mode Data Register access
sizes when communicating with a HyperFlash or Octal-SPI Flash device.

Fix this, and avoid the back-and-forth conversion between transfer size
and Transfer Data Enable bits, by explicitly storing the transfer size
in struct rpcif, and using that value to determine access size in
rpcif_reg_{read,write}().

Enforce that the "high" Manual Mode Read/Write Data Registers
(SM[RW]DR1) are only used for 8-byte data accesses.
While at it, forbid writing to the Manual Mode Read Data Registers,
as they are read-only.

Fixes: fff53a551d ("memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/cde9bfacf704c81865f57b15d1b48a4793da4286.1649681476.git.geert+renesas@glider.be
Link: https://lore.kernel.org/r/20220420070526.9367-1-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-05-09 09:14:34 +02:00

98 lines
1.8 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* Renesas RPC-IF core driver
*
* Copyright (C) 2018~2019 Renesas Solutions Corp.
* Copyright (C) 2019 Macronix International Co., Ltd.
* Copyright (C) 2019-2020 Cogent Embedded, Inc.
*/
#ifndef __RENESAS_RPC_IF_H
#define __RENESAS_RPC_IF_H
#include <linux/pm_runtime.h>
#include <linux/types.h>
enum rpcif_data_dir {
RPCIF_NO_DATA,
RPCIF_DATA_IN,
RPCIF_DATA_OUT,
};
struct rpcif_op {
struct {
u8 buswidth;
u8 opcode;
bool ddr;
} cmd, ocmd;
struct {
u8 nbytes;
u8 buswidth;
bool ddr;
u64 val;
} addr;
struct {
u8 ncycles;
u8 buswidth;
} dummy;
struct {
u8 nbytes;
u8 buswidth;
bool ddr;
u32 val;
} option;
struct {
u8 buswidth;
unsigned int nbytes;
enum rpcif_data_dir dir;
bool ddr;
union {
void *in;
const void *out;
} buf;
} data;
};
struct rpcif {
struct device *dev;
void __iomem *base;
void __iomem *dirmap;
struct regmap *regmap;
struct reset_control *rstc;
size_t size;
enum rpcif_data_dir dir;
u8 bus_size;
u8 xfer_size;
void *buffer;
u32 xferlen;
u32 smcr;
u32 smadr;
u32 command; /* DRCMR or SMCMR */
u32 option; /* DROPR or SMOPR */
u32 enable; /* DRENR or SMENR */
u32 dummy; /* DRDMCR or SMDMCR */
u32 ddr; /* DRDRENR or SMDRENR */
};
int rpcif_sw_init(struct rpcif *rpc, struct device *dev);
void rpcif_hw_init(struct rpcif *rpc, bool hyperflash);
void rpcif_prepare(struct rpcif *rpc, const struct rpcif_op *op, u64 *offs,
size_t *len);
int rpcif_manual_xfer(struct rpcif *rpc);
ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf);
static inline void rpcif_enable_rpm(struct rpcif *rpc)
{
pm_runtime_enable(rpc->dev);
}
static inline void rpcif_disable_rpm(struct rpcif *rpc)
{
pm_runtime_disable(rpc->dev);
}
#endif // __RENESAS_RPC_IF_H