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9bf75da0e2
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230823132744.350618-14-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* NXP LPC18xx/43xx OTP memory NVMEM driver
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*
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* Copyright (c) 2016 Joachim Eastwood <manabian@gmail.com>
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*
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* Based on the imx ocotp driver,
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* Copyright (c) 2015 Pengutronix, Philipp Zabel <p.zabel@pengutronix.de>
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*
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* TODO: add support for writing OTP register via API in boot ROM.
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*/
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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/*
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* LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts
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* at offset 0 from the base.
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*
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* Bank 0 contains the part ID for Flashless devices and is reseverd for
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* devices with Flash.
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* Bank 1/2 is generale purpose or AES key storage for secure devices.
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* Bank 3 contains control data, USB ID and generale purpose words.
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*/
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#define LPC18XX_OTP_NUM_BANKS 4
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#define LPC18XX_OTP_WORDS_PER_BANK 4
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#define LPC18XX_OTP_WORD_SIZE sizeof(u32)
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#define LPC18XX_OTP_SIZE (LPC18XX_OTP_NUM_BANKS * \
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LPC18XX_OTP_WORDS_PER_BANK * \
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LPC18XX_OTP_WORD_SIZE)
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struct lpc18xx_otp {
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void __iomem *base;
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};
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static int lpc18xx_otp_read(void *context, unsigned int offset,
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void *val, size_t bytes)
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{
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struct lpc18xx_otp *otp = context;
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unsigned int count = bytes >> 2;
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u32 index = offset >> 2;
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u32 *buf = val;
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int i;
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if (count > (LPC18XX_OTP_SIZE - index))
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count = LPC18XX_OTP_SIZE - index;
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for (i = index; i < (index + count); i++)
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*buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE);
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return 0;
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}
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static struct nvmem_config lpc18xx_otp_nvmem_config = {
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.name = "lpc18xx-otp",
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.read_only = true,
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.word_size = LPC18XX_OTP_WORD_SIZE,
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.stride = LPC18XX_OTP_WORD_SIZE,
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.reg_read = lpc18xx_otp_read,
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};
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static int lpc18xx_otp_probe(struct platform_device *pdev)
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{
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struct nvmem_device *nvmem;
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struct lpc18xx_otp *otp;
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otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL);
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if (!otp)
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return -ENOMEM;
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otp->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(otp->base))
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return PTR_ERR(otp->base);
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lpc18xx_otp_nvmem_config.size = LPC18XX_OTP_SIZE;
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lpc18xx_otp_nvmem_config.dev = &pdev->dev;
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lpc18xx_otp_nvmem_config.priv = otp;
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nvmem = devm_nvmem_register(&pdev->dev, &lpc18xx_otp_nvmem_config);
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return PTR_ERR_OR_ZERO(nvmem);
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}
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static const struct of_device_id lpc18xx_otp_dt_ids[] = {
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{ .compatible = "nxp,lpc1850-otp" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, lpc18xx_otp_dt_ids);
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static struct platform_driver lpc18xx_otp_driver = {
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.probe = lpc18xx_otp_probe,
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.driver = {
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.name = "lpc18xx_otp",
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.of_match_table = lpc18xx_otp_dt_ids,
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},
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};
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module_platform_driver(lpc18xx_otp_driver);
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MODULE_AUTHOR("Joachim Eastwoood <manabian@gmail.com>");
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MODULE_DESCRIPTION("NXP LPC18xx OTP NVMEM driver");
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MODULE_LICENSE("GPL v2");
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