Shanker Donthineni 3faf24ea89 irqchip/gicv3-its: Implement two-level(indirect) device table support ... Since device IDs are extremely sparse, the single, a.k.a flat table is not sufficient for the following two reasons. 1) According to ARM-GIC spec, ITS hw can access maximum of 256(pages)* 64K(pageszie) bytes. In the best case, it supports upto DEVid=21 sparse with minimum device table entry size 8bytes. 2) The maximum memory size that is possible without memblock depends on MAX_ORDER. 4MB on 4K page size kernel with default MAX_ORDER, so it supports DEVid range 19bits. The two-level device table feature brings us two advantages, the first is a very high possibility of supporting upto 32bit sparse, and the second one is the best utilization of memory allocation. The feature is enabled automatically during driver probe if the memory requirement is more than 2*ITS-pages and the hardware is capable of two-level table walk. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2016-06-13 11:53:53 +01:00
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arm-gic-common.h	irqchip/gic-v3: Parse and export virtual GIC information	2016-05-03 12:54:21 +02:00
arm-gic-v3.h	irqchip/gicv3-its: Implement two-level(indirect) device table support	2016-06-13 11:53:53 +01:00
arm-gic.h	irqchip/gic: Add platform driver for non-root GICs that require RPM	2016-06-13 11:53:52 +01:00
arm-vic.h
chained_irq.h
ingenic.h	MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchip	2015-06-21 21:53:10 +02:00
irq-omap-intc.h	irqchip: omap-intc: Remove unused legacy interface for omap2	2015-01-26 11:38:23 +01:00
irq-partition-percpu.h	irqchip: Add per-cpu interrupt partitioning library	2016-05-02 13:42:51 +02:00
irq-sa11x0.h	ARM: 8367/1: sa1100: prepare for moving irq driver to drivers/irqchip	2015-05-28 14:40:03 +01:00
metag-ext.h
metag.h
mips-gic.h	irqchip: mips-gic: Provide VP ID accessor	2016-05-13 14:01:49 +02:00
mmp.h
mxs.h
versatile-fpga.h
xtensa-mx.h
xtensa-pic.h