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![Richard Röjfors](/assets/img/avatar_default.png)
This patch adds platform data to the ks8842 driver. Via the platform data a MAC address, to be used by the controller, can be passed. To ensure this MAC address is used, the MAC address is written after each hardware reset. Signed-off-by: Richard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: David S. Miller <davem@davemloft.net>
761 lines
19 KiB
C
761 lines
19 KiB
C
/*
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* ks8842.c timberdale KS8842 ethernet driver
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* Copyright (c) 2009 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* Supports:
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* The Micrel KS8842 behind the timberdale FPGA
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/ks8842.h>
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#define DRV_NAME "ks8842"
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/* Timberdale specific Registers */
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#define REG_TIMB_RST 0x1c
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/* KS8842 registers */
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#define REG_SELECT_BANK 0x0e
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/* bank 0 registers */
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#define REG_QRFCR 0x04
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/* bank 2 registers */
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#define REG_MARL 0x00
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#define REG_MARM 0x02
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#define REG_MARH 0x04
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/* bank 3 registers */
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#define REG_GRR 0x06
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/* bank 16 registers */
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#define REG_TXCR 0x00
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#define REG_TXSR 0x02
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#define REG_RXCR 0x04
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#define REG_TXMIR 0x08
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#define REG_RXMIR 0x0A
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/* bank 17 registers */
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#define REG_TXQCR 0x00
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#define REG_RXQCR 0x02
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#define REG_TXFDPR 0x04
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#define REG_RXFDPR 0x06
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#define REG_QMU_DATA_LO 0x08
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#define REG_QMU_DATA_HI 0x0A
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/* bank 18 registers */
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#define REG_IER 0x00
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#define IRQ_LINK_CHANGE 0x8000
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#define IRQ_TX 0x4000
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#define IRQ_RX 0x2000
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#define IRQ_RX_OVERRUN 0x0800
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#define IRQ_TX_STOPPED 0x0200
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#define IRQ_RX_STOPPED 0x0100
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#define IRQ_RX_ERROR 0x0080
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#define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \
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IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR)
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#define REG_ISR 0x02
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#define REG_RXSR 0x04
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#define RXSR_VALID 0x8000
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#define RXSR_BROADCAST 0x80
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#define RXSR_MULTICAST 0x40
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#define RXSR_UNICAST 0x20
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#define RXSR_FRAMETYPE 0x08
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#define RXSR_TOO_LONG 0x04
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#define RXSR_RUNT 0x02
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#define RXSR_CRC_ERROR 0x01
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#define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR)
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/* bank 32 registers */
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#define REG_SW_ID_AND_ENABLE 0x00
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#define REG_SGCR1 0x02
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#define REG_SGCR2 0x04
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#define REG_SGCR3 0x06
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/* bank 39 registers */
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#define REG_MACAR1 0x00
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#define REG_MACAR2 0x02
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#define REG_MACAR3 0x04
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/* bank 45 registers */
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#define REG_P1MBCR 0x00
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#define REG_P1MBSR 0x02
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/* bank 46 registers */
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#define REG_P2MBCR 0x00
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#define REG_P2MBSR 0x02
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/* bank 48 registers */
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#define REG_P1CR2 0x02
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/* bank 49 registers */
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#define REG_P1CR4 0x02
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#define REG_P1SR 0x04
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struct ks8842_adapter {
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void __iomem *hw_addr;
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int irq;
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struct tasklet_struct tasklet;
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spinlock_t lock; /* spinlock to be interrupt safe */
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struct platform_device *pdev;
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};
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static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank)
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{
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iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK);
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}
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static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank,
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u8 value, int offset)
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{
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ks8842_select_bank(adapter, bank);
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iowrite8(value, adapter->hw_addr + offset);
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}
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static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank,
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u16 value, int offset)
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{
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ks8842_select_bank(adapter, bank);
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iowrite16(value, adapter->hw_addr + offset);
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}
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static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank,
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u16 bits, int offset)
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{
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u16 reg;
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ks8842_select_bank(adapter, bank);
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reg = ioread16(adapter->hw_addr + offset);
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reg |= bits;
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iowrite16(reg, adapter->hw_addr + offset);
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}
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static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank,
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u16 bits, int offset)
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{
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u16 reg;
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ks8842_select_bank(adapter, bank);
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reg = ioread16(adapter->hw_addr + offset);
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reg &= ~bits;
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iowrite16(reg, adapter->hw_addr + offset);
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}
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static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank,
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u32 value, int offset)
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{
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ks8842_select_bank(adapter, bank);
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iowrite32(value, adapter->hw_addr + offset);
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}
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static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank,
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int offset)
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{
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ks8842_select_bank(adapter, bank);
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return ioread8(adapter->hw_addr + offset);
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}
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static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank,
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int offset)
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{
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ks8842_select_bank(adapter, bank);
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return ioread16(adapter->hw_addr + offset);
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}
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static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank,
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int offset)
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{
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ks8842_select_bank(adapter, bank);
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return ioread32(adapter->hw_addr + offset);
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}
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static void ks8842_reset(struct ks8842_adapter *adapter)
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{
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/* The KS8842 goes haywire when doing softare reset
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* a work around in the timberdale IP is implemented to
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* do a hardware reset instead
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ks8842_write16(adapter, 3, 1, REG_GRR);
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msleep(10);
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iowrite16(0, adapter->hw_addr + REG_GRR);
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*/
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iowrite16(32, adapter->hw_addr + REG_SELECT_BANK);
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iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST);
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msleep(20);
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}
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static void ks8842_update_link_status(struct net_device *netdev,
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struct ks8842_adapter *adapter)
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{
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/* check the status of the link */
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if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) {
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netif_carrier_on(netdev);
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netif_wake_queue(netdev);
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} else {
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netif_stop_queue(netdev);
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netif_carrier_off(netdev);
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}
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}
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static void ks8842_enable_tx(struct ks8842_adapter *adapter)
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{
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ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR);
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}
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static void ks8842_disable_tx(struct ks8842_adapter *adapter)
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{
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ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR);
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}
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static void ks8842_enable_rx(struct ks8842_adapter *adapter)
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{
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ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR);
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}
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static void ks8842_disable_rx(struct ks8842_adapter *adapter)
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{
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ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR);
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}
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static void ks8842_reset_hw(struct ks8842_adapter *adapter)
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{
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/* reset the HW */
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ks8842_reset(adapter);
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/* Enable QMU Transmit flow control / transmit padding / Transmit CRC */
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ks8842_write16(adapter, 16, 0x000E, REG_TXCR);
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/* enable the receiver, uni + multi + broadcast + flow ctrl
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+ crc strip */
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ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400,
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REG_RXCR);
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/* TX frame pointer autoincrement */
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ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR);
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/* RX frame pointer autoincrement */
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ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR);
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/* RX 2 kb high watermark */
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ks8842_write16(adapter, 0, 0x1000, REG_QRFCR);
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/* aggresive back off in half duplex */
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ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1);
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/* enable no excessive collison drop */
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ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2);
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/* Enable port 1 force flow control / back pressure / transmit / recv */
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ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2);
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/* restart port auto-negotiation */
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ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4);
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/* only advertise 10Mbps */
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ks8842_clear_bits(adapter, 49, 3 << 2, REG_P1CR4);
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/* Enable the transmitter */
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ks8842_enable_tx(adapter);
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/* Enable the receiver */
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ks8842_enable_rx(adapter);
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/* clear all interrupts */
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ks8842_write16(adapter, 18, 0xffff, REG_ISR);
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/* enable interrupts */
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ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
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/* enable the switch */
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ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE);
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}
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static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest)
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{
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int i;
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u16 mac;
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for (i = 0; i < ETH_ALEN; i++)
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dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i);
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/* make sure the switch port uses the same MAC as the QMU */
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mac = ks8842_read16(adapter, 2, REG_MARL);
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ks8842_write16(adapter, 39, mac, REG_MACAR1);
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mac = ks8842_read16(adapter, 2, REG_MARM);
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ks8842_write16(adapter, 39, mac, REG_MACAR2);
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mac = ks8842_read16(adapter, 2, REG_MARH);
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ks8842_write16(adapter, 39, mac, REG_MACAR3);
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}
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static void ks8842_write_mac_addr(struct ks8842_adapter *adapter, u8 *mac)
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{
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unsigned long flags;
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unsigned i;
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spin_lock_irqsave(&adapter->lock, flags);
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for (i = 0; i < ETH_ALEN; i++) {
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ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i);
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ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1],
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REG_MACAR1 + i);
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}
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spin_unlock_irqrestore(&adapter->lock, flags);
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}
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static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter)
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{
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return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff;
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}
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static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev)
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{
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struct ks8842_adapter *adapter = netdev_priv(netdev);
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int len = skb->len;
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u32 *ptr = (u32 *)skb->data;
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u32 ctrl;
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dev_dbg(&adapter->pdev->dev,
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"%s: len %u head %p data %p tail %p end %p\n",
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__func__, skb->len, skb->head, skb->data,
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skb_tail_pointer(skb), skb_end_pointer(skb));
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/* check FIFO buffer space, we need space for CRC and command bits */
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if (ks8842_tx_fifo_space(adapter) < len + 8)
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return NETDEV_TX_BUSY;
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/* the control word, enable IRQ, port 1 and the length */
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ctrl = 0x8000 | 0x100 | (len << 16);
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ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO);
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netdev->stats.tx_bytes += len;
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/* copy buffer */
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while (len > 0) {
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iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO);
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len -= sizeof(u32);
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ptr++;
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}
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/* enqueue packet */
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ks8842_write16(adapter, 17, 1, REG_TXQCR);
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dev_kfree_skb(skb);
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return NETDEV_TX_OK;
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}
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static void ks8842_rx_frame(struct net_device *netdev,
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struct ks8842_adapter *adapter)
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{
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u32 status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO);
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int len = (status >> 16) & 0x7ff;
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status &= 0xffff;
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dev_dbg(&adapter->pdev->dev, "%s - rx_data: status: %x\n",
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__func__, status);
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/* check the status */
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if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) {
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struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev, len);
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dev_dbg(&adapter->pdev->dev, "%s, got package, len: %d\n",
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__func__, len);
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if (skb) {
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u32 *data;
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netdev->stats.rx_packets++;
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netdev->stats.rx_bytes += len;
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if (status & RXSR_MULTICAST)
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netdev->stats.multicast++;
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data = (u32 *)skb_put(skb, len);
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ks8842_select_bank(adapter, 17);
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while (len > 0) {
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*data++ = ioread32(adapter->hw_addr +
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REG_QMU_DATA_LO);
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len -= sizeof(u32);
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}
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skb->protocol = eth_type_trans(skb, netdev);
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netif_rx(skb);
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} else
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netdev->stats.rx_dropped++;
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} else {
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dev_dbg(&adapter->pdev->dev, "RX error, status: %x\n", status);
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netdev->stats.rx_errors++;
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if (status & RXSR_TOO_LONG)
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netdev->stats.rx_length_errors++;
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if (status & RXSR_CRC_ERROR)
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netdev->stats.rx_crc_errors++;
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if (status & RXSR_RUNT)
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netdev->stats.rx_frame_errors++;
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}
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/* set high watermark to 3K */
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ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR);
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/* release the frame */
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ks8842_write16(adapter, 17, 0x01, REG_RXQCR);
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/* set high watermark to 2K */
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ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR);
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}
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void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter)
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{
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u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
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dev_dbg(&adapter->pdev->dev, "%s Entry - rx_data: %d\n",
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__func__, rx_data);
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while (rx_data) {
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ks8842_rx_frame(netdev, adapter);
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rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
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}
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}
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void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter)
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{
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u16 sr = ks8842_read16(adapter, 16, REG_TXSR);
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dev_dbg(&adapter->pdev->dev, "%s - entry, sr: %x\n", __func__, sr);
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netdev->stats.tx_packets++;
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if (netif_queue_stopped(netdev))
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netif_wake_queue(netdev);
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}
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void ks8842_handle_rx_overrun(struct net_device *netdev,
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struct ks8842_adapter *adapter)
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{
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dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
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netdev->stats.rx_errors++;
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netdev->stats.rx_fifo_errors++;
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}
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void ks8842_tasklet(unsigned long arg)
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{
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struct net_device *netdev = (struct net_device *)arg;
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struct ks8842_adapter *adapter = netdev_priv(netdev);
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u16 isr;
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unsigned long flags;
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u16 entry_bank;
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/* read current bank to be able to set it back */
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spin_lock_irqsave(&adapter->lock, flags);
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entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
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spin_unlock_irqrestore(&adapter->lock, flags);
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isr = ks8842_read16(adapter, 18, REG_ISR);
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dev_dbg(&adapter->pdev->dev, "%s - ISR: 0x%x\n", __func__, isr);
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/* Ack */
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ks8842_write16(adapter, 18, isr, REG_ISR);
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if (!netif_running(netdev))
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return;
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if (isr & IRQ_LINK_CHANGE)
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ks8842_update_link_status(netdev, adapter);
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if (isr & (IRQ_RX | IRQ_RX_ERROR))
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ks8842_handle_rx(netdev, adapter);
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|
|
|
if (isr & IRQ_TX)
|
|
ks8842_handle_tx(netdev, adapter);
|
|
|
|
if (isr & IRQ_RX_OVERRUN)
|
|
ks8842_handle_rx_overrun(netdev, adapter);
|
|
|
|
if (isr & IRQ_TX_STOPPED) {
|
|
ks8842_disable_tx(adapter);
|
|
ks8842_enable_tx(adapter);
|
|
}
|
|
|
|
if (isr & IRQ_RX_STOPPED) {
|
|
ks8842_disable_rx(adapter);
|
|
ks8842_enable_rx(adapter);
|
|
}
|
|
|
|
/* re-enable interrupts, put back the bank selection register */
|
|
spin_lock_irqsave(&adapter->lock, flags);
|
|
ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
|
|
iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
|
|
spin_unlock_irqrestore(&adapter->lock, flags);
|
|
}
|
|
|
|
static irqreturn_t ks8842_irq(int irq, void *devid)
|
|
{
|
|
struct ks8842_adapter *adapter = devid;
|
|
u16 isr;
|
|
u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
|
|
irqreturn_t ret = IRQ_NONE;
|
|
|
|
isr = ks8842_read16(adapter, 18, REG_ISR);
|
|
dev_dbg(&adapter->pdev->dev, "%s - ISR: 0x%x\n", __func__, isr);
|
|
|
|
if (isr) {
|
|
/* disable IRQ */
|
|
ks8842_write16(adapter, 18, 0x00, REG_IER);
|
|
|
|
/* schedule tasklet */
|
|
tasklet_schedule(&adapter->tasklet);
|
|
|
|
ret = IRQ_HANDLED;
|
|
}
|
|
|
|
iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
/* Netdevice operations */
|
|
|
|
static int ks8842_open(struct net_device *netdev)
|
|
{
|
|
struct ks8842_adapter *adapter = netdev_priv(netdev);
|
|
int err;
|
|
|
|
dev_dbg(&adapter->pdev->dev, "%s - entry\n", __func__);
|
|
|
|
/* reset the HW */
|
|
ks8842_reset_hw(adapter);
|
|
|
|
ks8842_write_mac_addr(adapter, netdev->dev_addr);
|
|
|
|
ks8842_update_link_status(netdev, adapter);
|
|
|
|
err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME,
|
|
adapter);
|
|
if (err) {
|
|
pr_err("Failed to request IRQ: %d: %d\n", adapter->irq, err);
|
|
return err;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ks8842_close(struct net_device *netdev)
|
|
{
|
|
struct ks8842_adapter *adapter = netdev_priv(netdev);
|
|
|
|
dev_dbg(&adapter->pdev->dev, "%s - entry\n", __func__);
|
|
|
|
/* free the irq */
|
|
free_irq(adapter->irq, adapter);
|
|
|
|
/* disable the switch */
|
|
ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb,
|
|
struct net_device *netdev)
|
|
{
|
|
int ret;
|
|
struct ks8842_adapter *adapter = netdev_priv(netdev);
|
|
|
|
dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
|
|
|
|
ret = ks8842_tx_frame(skb, netdev);
|
|
|
|
if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8)
|
|
netif_stop_queue(netdev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ks8842_set_mac(struct net_device *netdev, void *p)
|
|
{
|
|
struct ks8842_adapter *adapter = netdev_priv(netdev);
|
|
struct sockaddr *addr = p;
|
|
char *mac = (u8 *)addr->sa_data;
|
|
|
|
dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
|
|
|
|
if (!is_valid_ether_addr(addr->sa_data))
|
|
return -EADDRNOTAVAIL;
|
|
|
|
memcpy(netdev->dev_addr, mac, netdev->addr_len);
|
|
|
|
ks8842_write_mac_addr(adapter, mac);
|
|
return 0;
|
|
}
|
|
|
|
static void ks8842_tx_timeout(struct net_device *netdev)
|
|
{
|
|
struct ks8842_adapter *adapter = netdev_priv(netdev);
|
|
unsigned long flags;
|
|
|
|
dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
|
|
|
|
spin_lock_irqsave(&adapter->lock, flags);
|
|
/* disable interrupts */
|
|
ks8842_write16(adapter, 18, 0, REG_IER);
|
|
ks8842_write16(adapter, 18, 0xFFFF, REG_ISR);
|
|
spin_unlock_irqrestore(&adapter->lock, flags);
|
|
|
|
ks8842_reset_hw(adapter);
|
|
|
|
ks8842_write_mac_addr(adapter, netdev->dev_addr);
|
|
|
|
ks8842_update_link_status(netdev, adapter);
|
|
}
|
|
|
|
static const struct net_device_ops ks8842_netdev_ops = {
|
|
.ndo_open = ks8842_open,
|
|
.ndo_stop = ks8842_close,
|
|
.ndo_start_xmit = ks8842_xmit_frame,
|
|
.ndo_set_mac_address = ks8842_set_mac,
|
|
.ndo_tx_timeout = ks8842_tx_timeout,
|
|
.ndo_validate_addr = eth_validate_addr
|
|
};
|
|
|
|
static const struct ethtool_ops ks8842_ethtool_ops = {
|
|
.get_link = ethtool_op_get_link,
|
|
};
|
|
|
|
static int __devinit ks8842_probe(struct platform_device *pdev)
|
|
{
|
|
int err = -ENOMEM;
|
|
struct resource *iomem;
|
|
struct net_device *netdev;
|
|
struct ks8842_adapter *adapter;
|
|
struct ks8842_platform_data *pdata = pdev->dev.platform_data;
|
|
u16 id;
|
|
unsigned i;
|
|
|
|
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME))
|
|
goto err_mem_region;
|
|
|
|
netdev = alloc_etherdev(sizeof(struct ks8842_adapter));
|
|
if (!netdev)
|
|
goto err_alloc_etherdev;
|
|
|
|
SET_NETDEV_DEV(netdev, &pdev->dev);
|
|
|
|
adapter = netdev_priv(netdev);
|
|
adapter->hw_addr = ioremap(iomem->start, resource_size(iomem));
|
|
if (!adapter->hw_addr)
|
|
goto err_ioremap;
|
|
|
|
adapter->irq = platform_get_irq(pdev, 0);
|
|
if (adapter->irq < 0) {
|
|
err = adapter->irq;
|
|
goto err_get_irq;
|
|
}
|
|
|
|
adapter->pdev = pdev;
|
|
|
|
tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev);
|
|
spin_lock_init(&adapter->lock);
|
|
|
|
netdev->netdev_ops = &ks8842_netdev_ops;
|
|
netdev->ethtool_ops = &ks8842_ethtool_ops;
|
|
|
|
/* Check if a mac address was given */
|
|
i = netdev->addr_len;
|
|
if (pdata) {
|
|
for (i = 0; i < netdev->addr_len; i++)
|
|
if (pdata->macaddr[i] != 0)
|
|
break;
|
|
|
|
if (i < netdev->addr_len)
|
|
/* an address was passed, use it */
|
|
memcpy(netdev->dev_addr, pdata->macaddr,
|
|
netdev->addr_len);
|
|
}
|
|
|
|
if (i == netdev->addr_len) {
|
|
ks8842_read_mac_addr(adapter, netdev->dev_addr);
|
|
|
|
if (!is_valid_ether_addr(netdev->dev_addr))
|
|
random_ether_addr(netdev->dev_addr);
|
|
}
|
|
|
|
id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE);
|
|
|
|
strcpy(netdev->name, "eth%d");
|
|
err = register_netdev(netdev);
|
|
if (err)
|
|
goto err_register;
|
|
|
|
platform_set_drvdata(pdev, netdev);
|
|
|
|
pr_info("Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n",
|
|
(id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7);
|
|
|
|
return 0;
|
|
|
|
err_register:
|
|
err_get_irq:
|
|
iounmap(adapter->hw_addr);
|
|
err_ioremap:
|
|
free_netdev(netdev);
|
|
err_alloc_etherdev:
|
|
release_mem_region(iomem->start, resource_size(iomem));
|
|
err_mem_region:
|
|
return err;
|
|
}
|
|
|
|
static int __devexit ks8842_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *netdev = platform_get_drvdata(pdev);
|
|
struct ks8842_adapter *adapter = netdev_priv(netdev);
|
|
struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
unregister_netdev(netdev);
|
|
tasklet_kill(&adapter->tasklet);
|
|
iounmap(adapter->hw_addr);
|
|
free_netdev(netdev);
|
|
release_mem_region(iomem->start, resource_size(iomem));
|
|
platform_set_drvdata(pdev, NULL);
|
|
return 0;
|
|
}
|
|
|
|
|
|
static struct platform_driver ks8842_platform_driver = {
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = ks8842_probe,
|
|
.remove = ks8842_remove,
|
|
};
|
|
|
|
static int __init ks8842_init(void)
|
|
{
|
|
return platform_driver_register(&ks8842_platform_driver);
|
|
}
|
|
|
|
static void __exit ks8842_exit(void)
|
|
{
|
|
platform_driver_unregister(&ks8842_platform_driver);
|
|
}
|
|
|
|
module_init(ks8842_init);
|
|
module_exit(ks8842_exit);
|
|
|
|
MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver");
|
|
MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:ks8842");
|
|
|