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![Kyle Tso](/assets/img/avatar_default.png)
commit6490fa5655
upstream. Current timer PD_T_SINK_WAIT_CAP is set to 240ms which will violate the SinkWaitCapTimer (tTypeCSinkWaitCap 310 - 620 ms) defined in the PD Spec if the port is faster enough when running the state machine. Set it to the lower bound 310ms to ensure the timeout is in Spec. Fixes:f0690a25a1
("staging: typec: USB Type-C Port Manager (tcpm)") Cc: stable <stable@vger.kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kyle Tso <kyletso@google.com> Link: https://lore.kernel.org/r/20210528081613.730661-1-kyletso@google.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
491 lines
15 KiB
C
491 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2015-2017 Google, Inc
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*/
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#ifndef __LINUX_USB_PD_H
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#define __LINUX_USB_PD_H
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/usb/typec.h>
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/* USB PD Messages */
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enum pd_ctrl_msg_type {
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/* 0 Reserved */
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PD_CTRL_GOOD_CRC = 1,
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PD_CTRL_GOTO_MIN = 2,
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PD_CTRL_ACCEPT = 3,
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PD_CTRL_REJECT = 4,
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PD_CTRL_PING = 5,
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PD_CTRL_PS_RDY = 6,
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PD_CTRL_GET_SOURCE_CAP = 7,
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PD_CTRL_GET_SINK_CAP = 8,
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PD_CTRL_DR_SWAP = 9,
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PD_CTRL_PR_SWAP = 10,
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PD_CTRL_VCONN_SWAP = 11,
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PD_CTRL_WAIT = 12,
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PD_CTRL_SOFT_RESET = 13,
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/* 14-15 Reserved */
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PD_CTRL_NOT_SUPP = 16,
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PD_CTRL_GET_SOURCE_CAP_EXT = 17,
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PD_CTRL_GET_STATUS = 18,
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PD_CTRL_FR_SWAP = 19,
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PD_CTRL_GET_PPS_STATUS = 20,
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PD_CTRL_GET_COUNTRY_CODES = 21,
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/* 22-31 Reserved */
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};
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enum pd_data_msg_type {
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/* 0 Reserved */
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PD_DATA_SOURCE_CAP = 1,
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PD_DATA_REQUEST = 2,
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PD_DATA_BIST = 3,
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PD_DATA_SINK_CAP = 4,
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PD_DATA_BATT_STATUS = 5,
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PD_DATA_ALERT = 6,
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PD_DATA_GET_COUNTRY_INFO = 7,
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PD_DATA_ENTER_USB = 8,
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/* 9-14 Reserved */
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PD_DATA_VENDOR_DEF = 15,
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/* 16-31 Reserved */
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};
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enum pd_ext_msg_type {
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/* 0 Reserved */
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PD_EXT_SOURCE_CAP_EXT = 1,
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PD_EXT_STATUS = 2,
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PD_EXT_GET_BATT_CAP = 3,
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PD_EXT_GET_BATT_STATUS = 4,
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PD_EXT_BATT_CAP = 5,
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PD_EXT_GET_MANUFACTURER_INFO = 6,
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PD_EXT_MANUFACTURER_INFO = 7,
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PD_EXT_SECURITY_REQUEST = 8,
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PD_EXT_SECURITY_RESPONSE = 9,
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PD_EXT_FW_UPDATE_REQUEST = 10,
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PD_EXT_FW_UPDATE_RESPONSE = 11,
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PD_EXT_PPS_STATUS = 12,
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PD_EXT_COUNTRY_INFO = 13,
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PD_EXT_COUNTRY_CODES = 14,
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/* 15-31 Reserved */
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};
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#define PD_REV10 0x0
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#define PD_REV20 0x1
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#define PD_REV30 0x2
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#define PD_MAX_REV PD_REV30
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#define PD_HEADER_EXT_HDR BIT(15)
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#define PD_HEADER_CNT_SHIFT 12
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#define PD_HEADER_CNT_MASK 0x7
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#define PD_HEADER_ID_SHIFT 9
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#define PD_HEADER_ID_MASK 0x7
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#define PD_HEADER_PWR_ROLE BIT(8)
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#define PD_HEADER_REV_SHIFT 6
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#define PD_HEADER_REV_MASK 0x3
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#define PD_HEADER_DATA_ROLE BIT(5)
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#define PD_HEADER_TYPE_SHIFT 0
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#define PD_HEADER_TYPE_MASK 0x1f
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#define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \
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((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \
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((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \
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((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \
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(rev << PD_HEADER_REV_SHIFT) | \
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(((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \
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(((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \
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((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
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#define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
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cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
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static inline unsigned int pd_header_cnt(u16 header)
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{
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return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
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}
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static inline unsigned int pd_header_cnt_le(__le16 header)
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{
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return pd_header_cnt(le16_to_cpu(header));
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}
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static inline unsigned int pd_header_type(u16 header)
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{
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return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
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}
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static inline unsigned int pd_header_type_le(__le16 header)
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{
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return pd_header_type(le16_to_cpu(header));
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}
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static inline unsigned int pd_header_msgid(u16 header)
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{
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return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
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}
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static inline unsigned int pd_header_msgid_le(__le16 header)
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{
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return pd_header_msgid(le16_to_cpu(header));
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}
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static inline unsigned int pd_header_rev(u16 header)
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{
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return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
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}
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static inline unsigned int pd_header_rev_le(__le16 header)
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{
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return pd_header_rev(le16_to_cpu(header));
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}
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#define PD_EXT_HDR_CHUNKED BIT(15)
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#define PD_EXT_HDR_CHUNK_NUM_SHIFT 11
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#define PD_EXT_HDR_CHUNK_NUM_MASK 0xf
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#define PD_EXT_HDR_REQ_CHUNK BIT(10)
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#define PD_EXT_HDR_DATA_SIZE_SHIFT 0
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#define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff
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#define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \
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((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \
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((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \
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(((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \
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((chunked) ? PD_EXT_HDR_CHUNKED : 0))
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#define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
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cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
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static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
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{
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return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
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PD_EXT_HDR_CHUNK_NUM_MASK;
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}
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static inline unsigned int pd_ext_header_data_size(u16 ext_header)
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{
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return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
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PD_EXT_HDR_DATA_SIZE_MASK;
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}
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static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
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{
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return pd_ext_header_data_size(le16_to_cpu(ext_header));
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}
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#define PD_MAX_PAYLOAD 7
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#define PD_EXT_MAX_CHUNK_DATA 26
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/**
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* struct pd_chunked_ext_message_data - PD chunked extended message data as
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* seen on wire
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* @header: PD extended message header
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* @data: PD extended message data
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*/
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struct pd_chunked_ext_message_data {
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__le16 header;
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u8 data[PD_EXT_MAX_CHUNK_DATA];
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} __packed;
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/**
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* struct pd_message - PD message as seen on wire
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* @header: PD message header
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* @payload: PD message payload
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* @ext_msg: PD message chunked extended message data
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*/
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struct pd_message {
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__le16 header;
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union {
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__le32 payload[PD_MAX_PAYLOAD];
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struct pd_chunked_ext_message_data ext_msg;
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};
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} __packed;
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/* PDO: Power Data Object */
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#define PDO_MAX_OBJECTS 7
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enum pd_pdo_type {
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PDO_TYPE_FIXED = 0,
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PDO_TYPE_BATT = 1,
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PDO_TYPE_VAR = 2,
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PDO_TYPE_APDO = 3,
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};
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#define PDO_TYPE_SHIFT 30
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#define PDO_TYPE_MASK 0x3
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#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
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#define PDO_VOLT_MASK 0x3ff
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#define PDO_CURR_MASK 0x3ff
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#define PDO_PWR_MASK 0x3ff
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#define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */
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#define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */
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#define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */
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#define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */
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#define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */
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#define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */
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#define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */
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#define PDO_FIXED_FRS_CURR_SHIFT 23
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#define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
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#define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
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#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
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#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
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#define PDO_FIXED(mv, ma, flags) \
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(PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
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PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
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#define VSAFE5V 5000 /* mv units */
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#define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
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#define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
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#define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
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#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
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#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
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#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
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#define PDO_BATT(min_mv, max_mv, max_mw) \
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(PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
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PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
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#define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */
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#define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */
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#define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
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#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
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#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
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#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
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#define PDO_VAR(min_mv, max_mv, max_ma) \
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(PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
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PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
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enum pd_apdo_type {
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APDO_TYPE_PPS = 0,
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};
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#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
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#define PDO_APDO_TYPE_MASK 0x3
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#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
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#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */
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#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */
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#define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
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#define PDO_PPS_APDO_VOLT_MASK 0xff
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#define PDO_PPS_APDO_CURR_MASK 0x7f
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#define PDO_PPS_APDO_MIN_VOLT(mv) \
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((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
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#define PDO_PPS_APDO_MAX_VOLT(mv) \
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((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
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#define PDO_PPS_APDO_MAX_CURR(ma) \
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((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
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#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
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(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
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PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
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PDO_PPS_APDO_MAX_CURR(max_ma))
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static inline enum pd_pdo_type pdo_type(u32 pdo)
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{
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return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
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}
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static inline unsigned int pdo_fixed_voltage(u32 pdo)
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{
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return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
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}
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static inline unsigned int pdo_min_voltage(u32 pdo)
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{
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return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
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}
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static inline unsigned int pdo_max_voltage(u32 pdo)
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{
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return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
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}
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static inline unsigned int pdo_max_current(u32 pdo)
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{
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return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
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}
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static inline unsigned int pdo_max_power(u32 pdo)
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{
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return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
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}
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static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
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{
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return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
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}
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static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
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{
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return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
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PDO_PPS_APDO_VOLT_MASK) * 100;
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}
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static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
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{
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return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
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PDO_PPS_APDO_VOLT_MASK) * 100;
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}
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static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
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{
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return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
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PDO_PPS_APDO_CURR_MASK) * 50;
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}
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/* RDO: Request Data Object */
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#define RDO_OBJ_POS_SHIFT 28
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#define RDO_OBJ_POS_MASK 0x7
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#define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */
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#define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */
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#define RDO_USB_COMM BIT(25) /* USB communications capable */
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#define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */
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#define RDO_PWR_MASK 0x3ff
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#define RDO_CURR_MASK 0x3ff
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#define RDO_FIXED_OP_CURR_SHIFT 10
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#define RDO_FIXED_MAX_CURR_SHIFT 0
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#define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
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#define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
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#define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
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#define RDO_FIXED(idx, op_ma, max_ma, flags) \
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(RDO_OBJ(idx) | (flags) | \
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PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
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#define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */
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#define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
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#define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
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#define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
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#define RDO_BATT(idx, op_mw, max_mw, flags) \
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(RDO_OBJ(idx) | (flags) | \
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RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
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#define RDO_PROG_VOLT_MASK 0x7ff
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#define RDO_PROG_CURR_MASK 0x7f
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#define RDO_PROG_VOLT_SHIFT 9
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#define RDO_PROG_CURR_SHIFT 0
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#define RDO_PROG_VOLT_MV_STEP 20
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#define RDO_PROG_CURR_MA_STEP 50
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#define PDO_PROG_OUT_VOLT(mv) \
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((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
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#define PDO_PROG_OP_CURR(ma) \
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((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
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#define RDO_PROG(idx, out_mv, op_ma, flags) \
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(RDO_OBJ(idx) | (flags) | \
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PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
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static inline unsigned int rdo_index(u32 rdo)
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{
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return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
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}
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static inline unsigned int rdo_op_current(u32 rdo)
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{
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return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
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}
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|
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static inline unsigned int rdo_max_current(u32 rdo)
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{
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return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
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RDO_CURR_MASK) * 10;
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}
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|
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static inline unsigned int rdo_op_power(u32 rdo)
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|
{
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return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
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}
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|
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static inline unsigned int rdo_max_power(u32 rdo)
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|
{
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return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
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}
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|
|
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/* Enter_USB Data Object */
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|
#define EUDO_USB_MODE_MASK GENMASK(30, 28)
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#define EUDO_USB_MODE_SHIFT 28
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|
#define EUDO_USB_MODE_USB2 0
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|
#define EUDO_USB_MODE_USB3 1
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|
#define EUDO_USB_MODE_USB4 2
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|
#define EUDO_USB4_DRD BIT(26)
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|
#define EUDO_USB3_DRD BIT(25)
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|
#define EUDO_CABLE_SPEED_MASK GENMASK(23, 21)
|
|
#define EUDO_CABLE_SPEED_SHIFT 21
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|
#define EUDO_CABLE_SPEED_USB2 0
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|
#define EUDO_CABLE_SPEED_USB3_GEN1 1
|
|
#define EUDO_CABLE_SPEED_USB4_GEN2 2
|
|
#define EUDO_CABLE_SPEED_USB4_GEN3 3
|
|
#define EUDO_CABLE_TYPE_MASK GENMASK(20, 19)
|
|
#define EUDO_CABLE_TYPE_SHIFT 19
|
|
#define EUDO_CABLE_TYPE_PASSIVE 0
|
|
#define EUDO_CABLE_TYPE_RE_TIMER 1
|
|
#define EUDO_CABLE_TYPE_RE_DRIVER 2
|
|
#define EUDO_CABLE_TYPE_OPTICAL 3
|
|
#define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17)
|
|
#define EUDO_CABLE_CURRENT_SHIFT 17
|
|
#define EUDO_CABLE_CURRENT_NOTSUPP 0
|
|
#define EUDO_CABLE_CURRENT_3A 2
|
|
#define EUDO_CABLE_CURRENT_5A 3
|
|
#define EUDO_PCIE_SUPPORT BIT(16)
|
|
#define EUDO_DP_SUPPORT BIT(15)
|
|
#define EUDO_TBT_SUPPORT BIT(14)
|
|
#define EUDO_HOST_PRESENT BIT(13)
|
|
|
|
/* USB PD timers and counters */
|
|
#define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */
|
|
#define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */
|
|
#define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */
|
|
#define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */
|
|
#define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */
|
|
#define PD_T_SOURCE_ACTIVITY 45
|
|
#define PD_T_SINK_ACTIVITY 135
|
|
#define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */
|
|
#define PD_T_PS_TRANSITION 500
|
|
#define PD_T_SRC_TRANSITION 35
|
|
#define PD_T_DRP_SNK 40
|
|
#define PD_T_DRP_SRC 30
|
|
#define PD_T_PS_SOURCE_OFF 920
|
|
#define PD_T_PS_SOURCE_ON 480
|
|
#define PD_T_PS_HARD_RESET 30
|
|
#define PD_T_SRC_RECOVER 760
|
|
#define PD_T_SRC_RECOVER_MAX 1000
|
|
#define PD_T_SRC_TURN_ON 275
|
|
#define PD_T_SAFE_0V 650
|
|
#define PD_T_VCONN_SOURCE_ON 100
|
|
#define PD_T_SINK_REQUEST 100 /* 100 ms minimum */
|
|
#define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */
|
|
#define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */
|
|
#define PD_T_NEWSRC 250 /* Maximum of 275ms */
|
|
#define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */
|
|
#define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */
|
|
|
|
#define PD_T_DRP_TRY 100 /* 75 - 150 ms */
|
|
#define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */
|
|
|
|
#define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */
|
|
#define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */
|
|
|
|
#define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
|
|
#define PD_N_HARD_RESET_COUNT 2
|
|
|
|
#endif /* __LINUX_USB_PD_H */
|