948 lines
29 KiB
C
948 lines
29 KiB
C
/*
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* Copyright 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "link_dp_cts.h"
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#include "link/link_resource.h"
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#include "link/protocols/link_dpcd.h"
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#include "link/protocols/link_dp_training.h"
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#include "link/protocols/link_dp_phy.h"
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#include "link/protocols/link_dp_training_fixed_vs_pe_retimer.h"
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#include "link/protocols/link_dp_capability.h"
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#include "link/link_dpms.h"
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#include "resource.h"
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#include "dm_helpers.h"
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#include "dc_dmub_srv.h"
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#include "dce/dmub_hw_lock_mgr.h"
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#define DC_LOGGER \
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link->ctx->logger
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static enum dc_link_rate get_link_rate_from_test_link_rate(uint8_t test_rate)
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{
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switch (test_rate) {
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case DP_TEST_LINK_RATE_RBR:
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return LINK_RATE_LOW;
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case DP_TEST_LINK_RATE_HBR:
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return LINK_RATE_HIGH;
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case DP_TEST_LINK_RATE_HBR2:
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return LINK_RATE_HIGH2;
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case DP_TEST_LINK_RATE_HBR3:
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return LINK_RATE_HIGH3;
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case DP_TEST_LINK_RATE_UHBR10:
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return LINK_RATE_UHBR10;
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case DP_TEST_LINK_RATE_UHBR20:
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return LINK_RATE_UHBR20;
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case DP_TEST_LINK_RATE_UHBR13_5_LEGACY:
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case DP_TEST_LINK_RATE_UHBR13_5:
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return LINK_RATE_UHBR13_5;
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default:
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return LINK_RATE_UNKNOWN;
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}
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}
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static void dp_retrain_link_dp_test(struct dc_link *link,
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struct dc_link_settings *link_setting,
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bool skip_video_pattern)
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{
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struct pipe_ctx *pipes[MAX_PIPES];
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struct dc_state *state = link->dc->current_state;
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uint8_t count;
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int i;
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udelay(100);
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link_get_master_pipes_with_dpms_on(link, state, &count, pipes);
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for (i = 0; i < count; i++) {
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link_set_dpms_off(pipes[i]);
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pipes[i]->link_config.dp_link_settings = *link_setting;
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update_dp_encoder_resources_for_test_harness(
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link->dc,
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state,
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pipes[i]);
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}
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for (i = count-1; i >= 0; i--)
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link_set_dpms_on(state, pipes[i]);
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}
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static void dp_test_send_link_training(struct dc_link *link)
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{
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struct dc_link_settings link_settings = {0};
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uint8_t test_rate = 0;
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core_link_read_dpcd(
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link,
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DP_TEST_LANE_COUNT,
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(unsigned char *)(&link_settings.lane_count),
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1);
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core_link_read_dpcd(
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link,
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DP_TEST_LINK_RATE,
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&test_rate,
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1);
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link_settings.link_rate = get_link_rate_from_test_link_rate(test_rate);
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if (link_settings.link_rate == LINK_RATE_UNKNOWN) {
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DC_LOG_ERROR("%s: Invalid test link rate.", __func__);
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ASSERT(0);
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}
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/* Set preferred link settings */
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link->verified_link_cap.lane_count = link_settings.lane_count;
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link->verified_link_cap.link_rate = link_settings.link_rate;
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dp_retrain_link_dp_test(link, &link_settings, false);
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}
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static void dp_test_get_audio_test_data(struct dc_link *link, bool disable_video)
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{
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union audio_test_mode dpcd_test_mode = {0};
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struct audio_test_pattern_type dpcd_pattern_type = {0};
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union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COUNT] = {0};
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enum dp_test_pattern test_pattern = DP_TEST_PATTERN_AUDIO_OPERATOR_DEFINED;
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struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx;
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struct pipe_ctx *pipe_ctx = &pipes[0];
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unsigned int channel_count;
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unsigned int channel = 0;
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unsigned int modes = 0;
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unsigned int sampling_rate_in_hz = 0;
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// get audio test mode and test pattern parameters
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core_link_read_dpcd(
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link,
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DP_TEST_AUDIO_MODE,
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&dpcd_test_mode.raw,
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sizeof(dpcd_test_mode));
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core_link_read_dpcd(
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link,
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DP_TEST_AUDIO_PATTERN_TYPE,
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&dpcd_pattern_type.value,
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sizeof(dpcd_pattern_type));
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channel_count = min(dpcd_test_mode.bits.channel_count + 1, AUDIO_CHANNELS_COUNT);
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// read pattern periods for requested channels when sawTooth pattern is requested
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if (dpcd_pattern_type.value == AUDIO_TEST_PATTERN_SAWTOOTH ||
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dpcd_pattern_type.value == AUDIO_TEST_PATTERN_OPERATOR_DEFINED) {
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test_pattern = (dpcd_pattern_type.value == AUDIO_TEST_PATTERN_SAWTOOTH) ?
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DP_TEST_PATTERN_AUDIO_SAWTOOTH : DP_TEST_PATTERN_AUDIO_OPERATOR_DEFINED;
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// read period for each channel
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for (channel = 0; channel < channel_count; channel++) {
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core_link_read_dpcd(
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link,
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DP_TEST_AUDIO_PERIOD_CH1 + channel,
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&dpcd_pattern_period[channel].raw,
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sizeof(dpcd_pattern_period[channel]));
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}
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}
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// translate sampling rate
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switch (dpcd_test_mode.bits.sampling_rate) {
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case AUDIO_SAMPLING_RATE_32KHZ:
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sampling_rate_in_hz = 32000;
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break;
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case AUDIO_SAMPLING_RATE_44_1KHZ:
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sampling_rate_in_hz = 44100;
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break;
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case AUDIO_SAMPLING_RATE_48KHZ:
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sampling_rate_in_hz = 48000;
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break;
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case AUDIO_SAMPLING_RATE_88_2KHZ:
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sampling_rate_in_hz = 88200;
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break;
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case AUDIO_SAMPLING_RATE_96KHZ:
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sampling_rate_in_hz = 96000;
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break;
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case AUDIO_SAMPLING_RATE_176_4KHZ:
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sampling_rate_in_hz = 176400;
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break;
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case AUDIO_SAMPLING_RATE_192KHZ:
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sampling_rate_in_hz = 192000;
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break;
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default:
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sampling_rate_in_hz = 0;
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break;
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}
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link->audio_test_data.flags.test_requested = 1;
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link->audio_test_data.flags.disable_video = disable_video;
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link->audio_test_data.sampling_rate = sampling_rate_in_hz;
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link->audio_test_data.channel_count = channel_count;
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link->audio_test_data.pattern_type = test_pattern;
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if (test_pattern == DP_TEST_PATTERN_AUDIO_SAWTOOTH) {
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for (modes = 0; modes < pipe_ctx->stream->audio_info.mode_count; modes++) {
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link->audio_test_data.pattern_period[modes] = dpcd_pattern_period[modes].bits.pattern_period;
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}
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}
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}
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/* TODO Raven hbr2 compliance eye output is unstable
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* (toggling on and off) with debugger break
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* This caueses intermittent PHY automation failure
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* Need to look into the root cause */
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static void dp_test_send_phy_test_pattern(struct dc_link *link)
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{
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union phy_test_pattern dpcd_test_pattern;
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union lane_adjust dpcd_lane_adjustment[2];
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unsigned char dpcd_post_cursor_2_adjustment = 0;
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unsigned char test_pattern_buffer[
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(DP_TEST_264BIT_CUSTOM_PATTERN_263_256 -
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DP_TEST_264BIT_CUSTOM_PATTERN_7_0)+1] = {0};
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unsigned int test_pattern_size = 0;
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enum dp_test_pattern test_pattern;
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union lane_adjust dpcd_lane_adjust;
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unsigned int lane;
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struct link_training_settings link_training_settings;
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unsigned char no_preshoot = 0;
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unsigned char no_deemphasis = 0;
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dpcd_test_pattern.raw = 0;
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memset(dpcd_lane_adjustment, 0, sizeof(dpcd_lane_adjustment));
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memset(&link_training_settings, 0, sizeof(link_training_settings));
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/* get phy test pattern and pattern parameters from DP receiver */
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core_link_read_dpcd(
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link,
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DP_PHY_TEST_PATTERN,
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&dpcd_test_pattern.raw,
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sizeof(dpcd_test_pattern));
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core_link_read_dpcd(
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link,
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DP_ADJUST_REQUEST_LANE0_1,
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&dpcd_lane_adjustment[0].raw,
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sizeof(dpcd_lane_adjustment));
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/* prepare link training settings */
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link_training_settings.link_settings = link->cur_link_settings;
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link_training_settings.lttpr_mode = dp_decide_lttpr_mode(link, &link->cur_link_settings);
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if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
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link_training_settings.lttpr_mode == LTTPR_MODE_TRANSPARENT)
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dp_fixed_vs_pe_read_lane_adjust(
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link,
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link_training_settings.dpcd_lane_settings);
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/*get post cursor 2 parameters
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* For DP 1.1a or eariler, this DPCD register's value is 0
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* For DP 1.2 or later:
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* Bits 1:0 = POST_CURSOR2_LANE0; Bits 3:2 = POST_CURSOR2_LANE1
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* Bits 5:4 = POST_CURSOR2_LANE2; Bits 7:6 = POST_CURSOR2_LANE3
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*/
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core_link_read_dpcd(
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link,
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DP_ADJUST_REQUEST_POST_CURSOR2,
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&dpcd_post_cursor_2_adjustment,
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sizeof(dpcd_post_cursor_2_adjustment));
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/* translate request */
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switch (dpcd_test_pattern.bits.PATTERN) {
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case PHY_TEST_PATTERN_D10_2:
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test_pattern = DP_TEST_PATTERN_D102;
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break;
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case PHY_TEST_PATTERN_SYMBOL_ERROR:
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test_pattern = DP_TEST_PATTERN_SYMBOL_ERROR;
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break;
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case PHY_TEST_PATTERN_PRBS7:
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test_pattern = DP_TEST_PATTERN_PRBS7;
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break;
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case PHY_TEST_PATTERN_80BIT_CUSTOM:
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test_pattern = DP_TEST_PATTERN_80BIT_CUSTOM;
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break;
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case PHY_TEST_PATTERN_CP2520_1:
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/* CP2520 pattern is unstable, temporarily use TPS4 instead */
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test_pattern = (link->dc->caps.force_dp_tps4_for_cp2520 == 1) ?
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DP_TEST_PATTERN_TRAINING_PATTERN4 :
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DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE;
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break;
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case PHY_TEST_PATTERN_CP2520_2:
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/* CP2520 pattern is unstable, temporarily use TPS4 instead */
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test_pattern = (link->dc->caps.force_dp_tps4_for_cp2520 == 1) ?
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DP_TEST_PATTERN_TRAINING_PATTERN4 :
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DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE;
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break;
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case PHY_TEST_PATTERN_CP2520_3:
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test_pattern = DP_TEST_PATTERN_TRAINING_PATTERN4;
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break;
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case PHY_TEST_PATTERN_128b_132b_TPS1:
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test_pattern = DP_TEST_PATTERN_128b_132b_TPS1;
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break;
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case PHY_TEST_PATTERN_128b_132b_TPS2:
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test_pattern = DP_TEST_PATTERN_128b_132b_TPS2;
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break;
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case PHY_TEST_PATTERN_PRBS9:
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test_pattern = DP_TEST_PATTERN_PRBS9;
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break;
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case PHY_TEST_PATTERN_PRBS11:
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test_pattern = DP_TEST_PATTERN_PRBS11;
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break;
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case PHY_TEST_PATTERN_PRBS15:
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test_pattern = DP_TEST_PATTERN_PRBS15;
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break;
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case PHY_TEST_PATTERN_PRBS23:
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test_pattern = DP_TEST_PATTERN_PRBS23;
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break;
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case PHY_TEST_PATTERN_PRBS31:
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test_pattern = DP_TEST_PATTERN_PRBS31;
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break;
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case PHY_TEST_PATTERN_264BIT_CUSTOM:
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test_pattern = DP_TEST_PATTERN_264BIT_CUSTOM;
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break;
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case PHY_TEST_PATTERN_SQUARE:
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test_pattern = DP_TEST_PATTERN_SQUARE;
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break;
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case PHY_TEST_PATTERN_SQUARE_PRESHOOT_DISABLED:
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test_pattern = DP_TEST_PATTERN_SQUARE_PRESHOOT_DISABLED;
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no_preshoot = 1;
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break;
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case PHY_TEST_PATTERN_SQUARE_DEEMPHASIS_DISABLED:
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test_pattern = DP_TEST_PATTERN_SQUARE_DEEMPHASIS_DISABLED;
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no_deemphasis = 1;
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break;
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case PHY_TEST_PATTERN_SQUARE_PRESHOOT_DEEMPHASIS_DISABLED:
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test_pattern = DP_TEST_PATTERN_SQUARE_PRESHOOT_DEEMPHASIS_DISABLED;
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no_preshoot = 1;
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no_deemphasis = 1;
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break;
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default:
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test_pattern = DP_TEST_PATTERN_VIDEO_MODE;
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break;
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}
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if (test_pattern == DP_TEST_PATTERN_80BIT_CUSTOM) {
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test_pattern_size = (DP_TEST_80BIT_CUSTOM_PATTERN_79_72 -
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DP_TEST_80BIT_CUSTOM_PATTERN_7_0) + 1;
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core_link_read_dpcd(
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link,
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DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
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test_pattern_buffer,
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test_pattern_size);
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}
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if (IS_DP_PHY_SQUARE_PATTERN(test_pattern)) {
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test_pattern_size = 1; // Square pattern data is 1 byte (DP spec)
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core_link_read_dpcd(
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link,
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DP_PHY_SQUARE_PATTERN,
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test_pattern_buffer,
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test_pattern_size);
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}
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if (test_pattern == DP_TEST_PATTERN_264BIT_CUSTOM) {
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test_pattern_size = (DP_TEST_264BIT_CUSTOM_PATTERN_263_256-
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DP_TEST_264BIT_CUSTOM_PATTERN_7_0) + 1;
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core_link_read_dpcd(
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link,
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DP_TEST_264BIT_CUSTOM_PATTERN_7_0,
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test_pattern_buffer,
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test_pattern_size);
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}
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for (lane = 0; lane <
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(unsigned int)(link->cur_link_settings.lane_count);
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lane++) {
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dpcd_lane_adjust.raw =
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dp_get_nibble_at_index(&dpcd_lane_adjustment[0].raw, lane);
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if (link_dp_get_encoding_format(&link->cur_link_settings) ==
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DP_8b_10b_ENCODING) {
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link_training_settings.hw_lane_settings[lane].VOLTAGE_SWING =
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(enum dc_voltage_swing)
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(dpcd_lane_adjust.bits.VOLTAGE_SWING_LANE);
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link_training_settings.hw_lane_settings[lane].PRE_EMPHASIS =
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(enum dc_pre_emphasis)
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(dpcd_lane_adjust.bits.PRE_EMPHASIS_LANE);
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link_training_settings.hw_lane_settings[lane].POST_CURSOR2 =
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(enum dc_post_cursor2)
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((dpcd_post_cursor_2_adjustment >> (lane * 2)) & 0x03);
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} else if (link_dp_get_encoding_format(&link->cur_link_settings) ==
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DP_128b_132b_ENCODING) {
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link_training_settings.hw_lane_settings[lane].FFE_PRESET.settings.level =
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dpcd_lane_adjust.tx_ffe.PRESET_VALUE;
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link_training_settings.hw_lane_settings[lane].FFE_PRESET.settings.no_preshoot = no_preshoot;
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link_training_settings.hw_lane_settings[lane].FFE_PRESET.settings.no_deemphasis = no_deemphasis;
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}
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}
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dp_hw_to_dpcd_lane_settings(&link_training_settings,
|
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link_training_settings.hw_lane_settings,
|
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link_training_settings.dpcd_lane_settings);
|
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/*Usage: Measure DP physical lane signal
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* by DP SI test equipment automatically.
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* PHY test pattern request is generated by equipment via HPD interrupt.
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* HPD needs to be active all the time. HPD should be active
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* all the time. Do not touch it.
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* forward request to DS
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*/
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dp_set_test_pattern(
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link,
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test_pattern,
|
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DP_TEST_PATTERN_COLOR_SPACE_UNDEFINED,
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&link_training_settings,
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test_pattern_buffer,
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test_pattern_size);
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}
|
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|
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static void set_crtc_test_pattern(struct dc_link *link,
|
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struct pipe_ctx *pipe_ctx,
|
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enum dp_test_pattern test_pattern,
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enum dp_test_pattern_color_space test_pattern_color_space)
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{
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enum controller_dp_test_pattern controller_test_pattern;
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enum dc_color_depth color_depth = pipe_ctx->
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stream->timing.display_color_depth;
|
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struct bit_depth_reduction_params params;
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struct output_pixel_processor *opp = pipe_ctx->stream_res.opp;
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struct pipe_ctx *odm_pipe;
|
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struct test_pattern_params *tp_params;
|
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memset(¶ms, 0, sizeof(params));
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resource_build_test_pattern_params(&link->dc->current_state->res_ctx,
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pipe_ctx);
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controller_test_pattern = pipe_ctx->stream_res.test_pattern_params.test_pattern;
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|
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switch (test_pattern) {
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case DP_TEST_PATTERN_COLOR_SQUARES:
|
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case DP_TEST_PATTERN_COLOR_SQUARES_CEA:
|
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case DP_TEST_PATTERN_VERTICAL_BARS:
|
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case DP_TEST_PATTERN_HORIZONTAL_BARS:
|
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case DP_TEST_PATTERN_COLOR_RAMP:
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{
|
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/* disable bit depth reduction */
|
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pipe_ctx->stream->bit_depth_params = params;
|
|
if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) {
|
|
opp->funcs->opp_program_bit_depth_reduction(opp, ¶ms);
|
|
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
|
controller_test_pattern, color_depth);
|
|
} else if (link->dc->hwss.set_disp_pattern_generator) {
|
|
enum controller_dp_color_space controller_color_space;
|
|
struct output_pixel_processor *odm_opp;
|
|
|
|
controller_color_space = pipe_ctx->stream_res.test_pattern_params.color_space;
|
|
|
|
if (controller_color_space == CONTROLLER_DP_COLOR_SPACE_UDEFINED) {
|
|
DC_LOG_ERROR("%s: Color space must be defined for test pattern", __func__);
|
|
ASSERT(0);
|
|
}
|
|
|
|
odm_pipe = pipe_ctx;
|
|
while (odm_pipe) {
|
|
tp_params = &odm_pipe->stream_res.test_pattern_params;
|
|
odm_opp = odm_pipe->stream_res.opp;
|
|
odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, ¶ms);
|
|
link->dc->hwss.set_disp_pattern_generator(link->dc,
|
|
odm_pipe,
|
|
tp_params->test_pattern,
|
|
tp_params->color_space,
|
|
tp_params->color_depth,
|
|
NULL,
|
|
tp_params->width,
|
|
tp_params->height,
|
|
tp_params->offset);
|
|
odm_pipe = odm_pipe->next_odm_pipe;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
case DP_TEST_PATTERN_VIDEO_MODE:
|
|
{
|
|
/* restore bitdepth reduction */
|
|
resource_build_bit_depth_reduction_params(pipe_ctx->stream, ¶ms);
|
|
pipe_ctx->stream->bit_depth_params = params;
|
|
if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) {
|
|
opp->funcs->opp_program_bit_depth_reduction(opp, ¶ms);
|
|
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
|
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
|
|
color_depth);
|
|
} else if (link->dc->hwss.set_disp_pattern_generator) {
|
|
struct output_pixel_processor *odm_opp;
|
|
|
|
odm_pipe = pipe_ctx;
|
|
while (odm_pipe) {
|
|
tp_params = &odm_pipe->stream_res.test_pattern_params;
|
|
odm_opp = odm_pipe->stream_res.opp;
|
|
odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, ¶ms);
|
|
link->dc->hwss.set_disp_pattern_generator(link->dc,
|
|
odm_pipe,
|
|
tp_params->test_pattern,
|
|
tp_params->color_space,
|
|
tp_params->color_depth,
|
|
NULL,
|
|
tp_params->width,
|
|
tp_params->height,
|
|
tp_params->offset);
|
|
odm_pipe = odm_pipe->next_odm_pipe;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
void dp_handle_automated_test(struct dc_link *link)
|
|
{
|
|
union test_request test_request;
|
|
union test_response test_response;
|
|
|
|
memset(&test_request, 0, sizeof(test_request));
|
|
memset(&test_response, 0, sizeof(test_response));
|
|
|
|
core_link_read_dpcd(
|
|
link,
|
|
DP_TEST_REQUEST,
|
|
&test_request.raw,
|
|
sizeof(union test_request));
|
|
if (test_request.bits.LINK_TRAINING) {
|
|
/* ACK first to let DP RX test box monitor LT sequence */
|
|
test_response.bits.ACK = 1;
|
|
core_link_write_dpcd(
|
|
link,
|
|
DP_TEST_RESPONSE,
|
|
&test_response.raw,
|
|
sizeof(test_response));
|
|
dp_test_send_link_training(link);
|
|
/* no acknowledge request is needed again */
|
|
test_response.bits.ACK = 0;
|
|
}
|
|
if (test_request.bits.LINK_TEST_PATTRN) {
|
|
union test_misc dpcd_test_params;
|
|
union link_test_pattern dpcd_test_pattern;
|
|
|
|
memset(&dpcd_test_pattern, 0, sizeof(dpcd_test_pattern));
|
|
memset(&dpcd_test_params, 0, sizeof(dpcd_test_params));
|
|
|
|
/* get link test pattern and pattern parameters */
|
|
core_link_read_dpcd(
|
|
link,
|
|
DP_TEST_PATTERN,
|
|
&dpcd_test_pattern.raw,
|
|
sizeof(dpcd_test_pattern));
|
|
core_link_read_dpcd(
|
|
link,
|
|
DP_TEST_MISC0,
|
|
&dpcd_test_params.raw,
|
|
sizeof(dpcd_test_params));
|
|
test_response.bits.ACK = dm_helpers_dp_handle_test_pattern_request(link->ctx, link,
|
|
dpcd_test_pattern, dpcd_test_params) ? 1 : 0;
|
|
}
|
|
|
|
if (test_request.bits.AUDIO_TEST_PATTERN) {
|
|
dp_test_get_audio_test_data(link, test_request.bits.TEST_AUDIO_DISABLED_VIDEO);
|
|
test_response.bits.ACK = 1;
|
|
}
|
|
|
|
if (test_request.bits.PHY_TEST_PATTERN) {
|
|
dp_test_send_phy_test_pattern(link);
|
|
test_response.bits.ACK = 1;
|
|
}
|
|
|
|
/* send request acknowledgment */
|
|
if (test_response.bits.ACK)
|
|
core_link_write_dpcd(
|
|
link,
|
|
DP_TEST_RESPONSE,
|
|
&test_response.raw,
|
|
sizeof(test_response));
|
|
}
|
|
|
|
bool dp_set_test_pattern(
|
|
struct dc_link *link,
|
|
enum dp_test_pattern test_pattern,
|
|
enum dp_test_pattern_color_space test_pattern_color_space,
|
|
const struct link_training_settings *p_link_settings,
|
|
const unsigned char *p_custom_pattern,
|
|
unsigned int cust_pattern_size)
|
|
{
|
|
const struct link_hwss *link_hwss;
|
|
struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx;
|
|
struct pipe_ctx *pipe_ctx = NULL;
|
|
unsigned int lane;
|
|
unsigned int i;
|
|
unsigned char link_qual_pattern[LANE_COUNT_DP_MAX] = {0};
|
|
union dpcd_training_pattern training_pattern;
|
|
enum dpcd_phy_test_patterns pattern;
|
|
|
|
memset(&training_pattern, 0, sizeof(training_pattern));
|
|
|
|
for (i = 0; i < MAX_PIPES; i++) {
|
|
if (pipes[i].stream == NULL)
|
|
continue;
|
|
|
|
if (resource_is_pipe_type(&pipes[i], OTG_MASTER) &&
|
|
pipes[i].stream->link == link) {
|
|
pipe_ctx = &pipes[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (pipe_ctx == NULL)
|
|
return false;
|
|
|
|
link->pending_test_pattern = test_pattern;
|
|
|
|
/* Reset CRTC Test Pattern if it is currently running and request is VideoMode */
|
|
if (link->test_pattern_enabled && test_pattern ==
|
|
DP_TEST_PATTERN_VIDEO_MODE) {
|
|
/* Set CRTC Test Pattern */
|
|
set_crtc_test_pattern(link, pipe_ctx, test_pattern, test_pattern_color_space);
|
|
dp_set_hw_test_pattern(link, &pipe_ctx->link_res, test_pattern,
|
|
(uint8_t *)p_custom_pattern,
|
|
(uint32_t)cust_pattern_size);
|
|
|
|
/* Unblank Stream */
|
|
link->dc->hwss.unblank_stream(
|
|
pipe_ctx,
|
|
&link->verified_link_cap);
|
|
/* TODO:m_pHwss->MuteAudioEndpoint
|
|
* (pPathMode->pDisplayPath, false);
|
|
*/
|
|
|
|
/* Reset Test Pattern state */
|
|
link->test_pattern_enabled = false;
|
|
link->current_test_pattern = test_pattern;
|
|
link->pending_test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
|
|
|
|
return true;
|
|
}
|
|
|
|
/* Check for PHY Test Patterns */
|
|
if (IS_DP_PHY_PATTERN(test_pattern)) {
|
|
/* Set DPCD Lane Settings before running test pattern */
|
|
if (p_link_settings != NULL) {
|
|
if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
|
|
p_link_settings->lttpr_mode == LTTPR_MODE_TRANSPARENT) {
|
|
dp_fixed_vs_pe_set_retimer_lane_settings(
|
|
link,
|
|
p_link_settings->dpcd_lane_settings,
|
|
p_link_settings->link_settings.lane_count);
|
|
} else {
|
|
dp_set_hw_lane_settings(link, &pipe_ctx->link_res, p_link_settings, DPRX);
|
|
}
|
|
dpcd_set_lane_settings(link, p_link_settings, DPRX);
|
|
}
|
|
|
|
/* Blank stream if running test pattern */
|
|
if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) {
|
|
/*TODO:
|
|
* m_pHwss->
|
|
* MuteAudioEndpoint(pPathMode->pDisplayPath, true);
|
|
*/
|
|
/* Blank stream */
|
|
link->dc->hwss.blank_stream(pipe_ctx);
|
|
}
|
|
|
|
dp_set_hw_test_pattern(link, &pipe_ctx->link_res, test_pattern,
|
|
(uint8_t *)p_custom_pattern,
|
|
(uint32_t)cust_pattern_size);
|
|
|
|
if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) {
|
|
/* Set Test Pattern state */
|
|
link->test_pattern_enabled = true;
|
|
link->current_test_pattern = test_pattern;
|
|
link->pending_test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
|
|
if (p_link_settings != NULL)
|
|
dpcd_set_link_settings(link,
|
|
p_link_settings);
|
|
}
|
|
|
|
switch (test_pattern) {
|
|
case DP_TEST_PATTERN_VIDEO_MODE:
|
|
pattern = PHY_TEST_PATTERN_NONE;
|
|
break;
|
|
case DP_TEST_PATTERN_D102:
|
|
pattern = PHY_TEST_PATTERN_D10_2;
|
|
break;
|
|
case DP_TEST_PATTERN_SYMBOL_ERROR:
|
|
pattern = PHY_TEST_PATTERN_SYMBOL_ERROR;
|
|
break;
|
|
case DP_TEST_PATTERN_PRBS7:
|
|
pattern = PHY_TEST_PATTERN_PRBS7;
|
|
break;
|
|
case DP_TEST_PATTERN_80BIT_CUSTOM:
|
|
pattern = PHY_TEST_PATTERN_80BIT_CUSTOM;
|
|
break;
|
|
case DP_TEST_PATTERN_CP2520_1:
|
|
pattern = PHY_TEST_PATTERN_CP2520_1;
|
|
break;
|
|
case DP_TEST_PATTERN_CP2520_2:
|
|
pattern = PHY_TEST_PATTERN_CP2520_2;
|
|
break;
|
|
case DP_TEST_PATTERN_CP2520_3:
|
|
pattern = PHY_TEST_PATTERN_CP2520_3;
|
|
break;
|
|
case DP_TEST_PATTERN_128b_132b_TPS1:
|
|
pattern = PHY_TEST_PATTERN_128b_132b_TPS1;
|
|
break;
|
|
case DP_TEST_PATTERN_128b_132b_TPS2:
|
|
pattern = PHY_TEST_PATTERN_128b_132b_TPS2;
|
|
break;
|
|
case DP_TEST_PATTERN_PRBS9:
|
|
pattern = PHY_TEST_PATTERN_PRBS9;
|
|
break;
|
|
case DP_TEST_PATTERN_PRBS11:
|
|
pattern = PHY_TEST_PATTERN_PRBS11;
|
|
break;
|
|
case DP_TEST_PATTERN_PRBS15:
|
|
pattern = PHY_TEST_PATTERN_PRBS15;
|
|
break;
|
|
case DP_TEST_PATTERN_PRBS23:
|
|
pattern = PHY_TEST_PATTERN_PRBS23;
|
|
break;
|
|
case DP_TEST_PATTERN_PRBS31:
|
|
pattern = PHY_TEST_PATTERN_PRBS31;
|
|
break;
|
|
case DP_TEST_PATTERN_264BIT_CUSTOM:
|
|
pattern = PHY_TEST_PATTERN_264BIT_CUSTOM;
|
|
break;
|
|
case DP_TEST_PATTERN_SQUARE:
|
|
pattern = PHY_TEST_PATTERN_SQUARE;
|
|
break;
|
|
case DP_TEST_PATTERN_SQUARE_PRESHOOT_DISABLED:
|
|
pattern = PHY_TEST_PATTERN_SQUARE_PRESHOOT_DISABLED;
|
|
break;
|
|
case DP_TEST_PATTERN_SQUARE_DEEMPHASIS_DISABLED:
|
|
pattern = PHY_TEST_PATTERN_SQUARE_DEEMPHASIS_DISABLED;
|
|
break;
|
|
case DP_TEST_PATTERN_SQUARE_PRESHOOT_DEEMPHASIS_DISABLED:
|
|
pattern = PHY_TEST_PATTERN_SQUARE_PRESHOOT_DEEMPHASIS_DISABLED;
|
|
break;
|
|
default:
|
|
return false;
|
|
}
|
|
|
|
if (test_pattern == DP_TEST_PATTERN_VIDEO_MODE
|
|
/*TODO:&& !pPathMode->pDisplayPath->IsTargetPoweredOn()*/)
|
|
return false;
|
|
|
|
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) {
|
|
if (IS_DP_PHY_SQUARE_PATTERN(test_pattern))
|
|
core_link_write_dpcd(link,
|
|
DP_LINK_SQUARE_PATTERN,
|
|
p_custom_pattern,
|
|
1);
|
|
|
|
/* tell receiver that we are sending qualification
|
|
* pattern DP 1.2 or later - DP receiver's link quality
|
|
* pattern is set using DPCD LINK_QUAL_LANEx_SET
|
|
* register (0x10B~0x10E)\
|
|
*/
|
|
for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++)
|
|
link_qual_pattern[lane] =
|
|
(unsigned char)(pattern);
|
|
|
|
core_link_write_dpcd(link,
|
|
DP_LINK_QUAL_LANE0_SET,
|
|
link_qual_pattern,
|
|
sizeof(link_qual_pattern));
|
|
} else if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 ||
|
|
link->dpcd_caps.dpcd_rev.raw == 0) {
|
|
/* tell receiver that we are sending qualification
|
|
* pattern DP 1.1a or earlier - DP receiver's link
|
|
* quality pattern is set using
|
|
* DPCD TRAINING_PATTERN_SET -> LINK_QUAL_PATTERN_SET
|
|
* register (0x102). We will use v_1.3 when we are
|
|
* setting test pattern for DP 1.1.
|
|
*/
|
|
core_link_read_dpcd(link, DP_TRAINING_PATTERN_SET,
|
|
&training_pattern.raw,
|
|
sizeof(training_pattern));
|
|
training_pattern.v1_3.LINK_QUAL_PATTERN_SET = pattern;
|
|
core_link_write_dpcd(link, DP_TRAINING_PATTERN_SET,
|
|
&training_pattern.raw,
|
|
sizeof(training_pattern));
|
|
}
|
|
} else {
|
|
enum dc_color_space color_space = COLOR_SPACE_UNKNOWN;
|
|
|
|
switch (test_pattern_color_space) {
|
|
case DP_TEST_PATTERN_COLOR_SPACE_RGB:
|
|
color_space = COLOR_SPACE_SRGB;
|
|
if (test_pattern == DP_TEST_PATTERN_COLOR_SQUARES_CEA)
|
|
color_space = COLOR_SPACE_SRGB_LIMITED;
|
|
break;
|
|
|
|
case DP_TEST_PATTERN_COLOR_SPACE_YCBCR601:
|
|
color_space = COLOR_SPACE_YCBCR601;
|
|
if (test_pattern == DP_TEST_PATTERN_COLOR_SQUARES_CEA)
|
|
color_space = COLOR_SPACE_YCBCR601_LIMITED;
|
|
break;
|
|
case DP_TEST_PATTERN_COLOR_SPACE_YCBCR709:
|
|
color_space = COLOR_SPACE_YCBCR709;
|
|
if (test_pattern == DP_TEST_PATTERN_COLOR_SQUARES_CEA)
|
|
color_space = COLOR_SPACE_YCBCR709_LIMITED;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable) {
|
|
if (pipe_ctx->stream && should_use_dmub_lock(pipe_ctx->stream->link)) {
|
|
union dmub_hw_lock_flags hw_locks = { 0 };
|
|
struct dmub_hw_lock_inst_flags inst_flags = { 0 };
|
|
|
|
hw_locks.bits.lock_dig = 1;
|
|
inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst;
|
|
|
|
dmub_hw_lock_mgr_cmd(link->ctx->dmub_srv,
|
|
true,
|
|
&hw_locks,
|
|
&inst_flags);
|
|
} else
|
|
pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable(
|
|
pipe_ctx->stream_res.tg);
|
|
}
|
|
|
|
pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg);
|
|
/* update MSA to requested color space */
|
|
link_hwss = get_link_hwss(link, &pipe_ctx->link_res);
|
|
pipe_ctx->stream->output_color_space = color_space;
|
|
link_hwss->setup_stream_attribute(pipe_ctx);
|
|
|
|
if (pipe_ctx->stream->use_vsc_sdp_for_colorimetry) {
|
|
if (test_pattern == DP_TEST_PATTERN_COLOR_SQUARES_CEA)
|
|
pipe_ctx->stream->vsc_infopacket.sb[17] |= (1 << 7); // sb17 bit 7 Dynamic Range: 0 = VESA range, 1 = CTA range
|
|
else
|
|
pipe_ctx->stream->vsc_infopacket.sb[17] &= ~(1 << 7);
|
|
|
|
if (color_space == COLOR_SPACE_YCBCR601_LIMITED)
|
|
pipe_ctx->stream->vsc_infopacket.sb[16] &= 0xf0;
|
|
else if (color_space == COLOR_SPACE_YCBCR709_LIMITED)
|
|
pipe_ctx->stream->vsc_infopacket.sb[16] |= 1;
|
|
|
|
resource_build_info_frame(pipe_ctx);
|
|
link->dc->hwss.update_info_frame(pipe_ctx);
|
|
}
|
|
|
|
/* CRTC Patterns */
|
|
set_crtc_test_pattern(link, pipe_ctx, test_pattern, test_pattern_color_space);
|
|
pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg);
|
|
pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg,
|
|
CRTC_STATE_VACTIVE);
|
|
pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg,
|
|
CRTC_STATE_VBLANK);
|
|
pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg,
|
|
CRTC_STATE_VACTIVE);
|
|
|
|
if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_disable) {
|
|
if (pipe_ctx->stream && should_use_dmub_lock(pipe_ctx->stream->link)) {
|
|
union dmub_hw_lock_flags hw_locks = { 0 };
|
|
struct dmub_hw_lock_inst_flags inst_flags = { 0 };
|
|
|
|
hw_locks.bits.lock_dig = 1;
|
|
inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst;
|
|
|
|
dmub_hw_lock_mgr_cmd(link->ctx->dmub_srv,
|
|
false,
|
|
&hw_locks,
|
|
&inst_flags);
|
|
} else
|
|
pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_disable(
|
|
pipe_ctx->stream_res.tg);
|
|
}
|
|
|
|
/* Set Test Pattern state */
|
|
link->test_pattern_enabled = true;
|
|
link->current_test_pattern = test_pattern;
|
|
link->pending_test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
void dp_set_preferred_link_settings(struct dc *dc,
|
|
struct dc_link_settings *link_setting,
|
|
struct dc_link *link)
|
|
{
|
|
int i;
|
|
struct pipe_ctx *pipe;
|
|
struct dc_stream_state *link_stream;
|
|
struct dc_link_settings store_settings = *link_setting;
|
|
|
|
link->preferred_link_setting = store_settings;
|
|
|
|
/* Retrain with preferred link settings only relevant for
|
|
* DP signal type
|
|
* Check for non-DP signal or if passive dongle present
|
|
*/
|
|
if (!dc_is_dp_signal(link->connector_signal) ||
|
|
link->dongle_max_pix_clk > 0)
|
|
return;
|
|
|
|
for (i = 0; i < MAX_PIPES; i++) {
|
|
pipe = &dc->current_state->res_ctx.pipe_ctx[i];
|
|
if (pipe->stream && pipe->stream->link) {
|
|
if (pipe->stream->link == link) {
|
|
link_stream = pipe->stream;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Stream not found */
|
|
if (i == MAX_PIPES)
|
|
return;
|
|
|
|
/* Cannot retrain link if backend is off */
|
|
if (link_stream->dpms_off)
|
|
return;
|
|
|
|
if (link_decide_link_settings(link_stream, &store_settings))
|
|
dp_retrain_link_dp_test(link, &store_settings, false);
|
|
}
|
|
|
|
void dp_set_preferred_training_settings(struct dc *dc,
|
|
struct dc_link_settings *link_setting,
|
|
struct dc_link_training_overrides *lt_overrides,
|
|
struct dc_link *link,
|
|
bool skip_immediate_retrain)
|
|
{
|
|
if (lt_overrides != NULL)
|
|
link->preferred_training_settings = *lt_overrides;
|
|
else
|
|
memset(&link->preferred_training_settings, 0, sizeof(link->preferred_training_settings));
|
|
|
|
if (link_setting != NULL) {
|
|
link->preferred_link_setting = *link_setting;
|
|
} else {
|
|
link->preferred_link_setting.lane_count = LANE_COUNT_UNKNOWN;
|
|
link->preferred_link_setting.link_rate = LINK_RATE_UNKNOWN;
|
|
}
|
|
|
|
if (link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT &&
|
|
link->type == dc_connection_mst_branch)
|
|
dm_helpers_dp_mst_update_branch_bandwidth(dc->ctx, link);
|
|
|
|
/* Retrain now, or wait until next stream update to apply */
|
|
if (skip_immediate_retrain == false)
|
|
dp_set_preferred_link_settings(dc, &link->preferred_link_setting, link);
|
|
}
|