288 lines
28 KiB
C
288 lines
28 KiB
C
/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _athub_4_1_0_OFFSET_HEADER
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#define _athub_4_1_0_OFFSET_HEADER
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// addressBlock: athub_xpbdec
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// base address: 0x3000
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#define regXPB_RTR_SRC_APRTR0 0x0000
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#define regXPB_RTR_SRC_APRTR0_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR1 0x0001
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#define regXPB_RTR_SRC_APRTR1_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR2 0x0002
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#define regXPB_RTR_SRC_APRTR2_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR3 0x0003
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#define regXPB_RTR_SRC_APRTR3_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR4 0x0004
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#define regXPB_RTR_SRC_APRTR4_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR5 0x0005
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#define regXPB_RTR_SRC_APRTR5_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR6 0x0006
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#define regXPB_RTR_SRC_APRTR6_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR7 0x0007
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#define regXPB_RTR_SRC_APRTR7_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR8 0x0008
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#define regXPB_RTR_SRC_APRTR8_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR9 0x0009
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#define regXPB_RTR_SRC_APRTR9_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR10 0x000a
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#define regXPB_RTR_SRC_APRTR10_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR11 0x000b
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#define regXPB_RTR_SRC_APRTR11_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR12 0x000c
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#define regXPB_RTR_SRC_APRTR12_BASE_IDX 0
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#define regXPB_RTR_SRC_APRTR13 0x000d
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#define regXPB_RTR_SRC_APRTR13_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP0 0x000e
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#define regXPB_RTR_DEST_MAP0_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP1 0x000f
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#define regXPB_RTR_DEST_MAP1_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP2 0x0010
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#define regXPB_RTR_DEST_MAP2_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP3 0x0011
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#define regXPB_RTR_DEST_MAP3_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP4 0x0012
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#define regXPB_RTR_DEST_MAP4_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP5 0x0013
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#define regXPB_RTR_DEST_MAP5_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP6 0x0014
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#define regXPB_RTR_DEST_MAP6_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP7 0x0015
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#define regXPB_RTR_DEST_MAP7_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP8 0x0016
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#define regXPB_RTR_DEST_MAP8_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP9 0x0017
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#define regXPB_RTR_DEST_MAP9_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP10 0x0018
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#define regXPB_RTR_DEST_MAP10_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP11 0x0019
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#define regXPB_RTR_DEST_MAP11_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP12 0x001a
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#define regXPB_RTR_DEST_MAP12_BASE_IDX 0
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#define regXPB_RTR_DEST_MAP13 0x001b
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#define regXPB_RTR_DEST_MAP13_BASE_IDX 0
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#define regXPB_CLG_CFG0 0x001c
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#define regXPB_CLG_CFG0_BASE_IDX 0
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#define regXPB_CLG_CFG1 0x001d
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#define regXPB_CLG_CFG1_BASE_IDX 0
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#define regXPB_CLG_CFG2 0x001e
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#define regXPB_CLG_CFG2_BASE_IDX 0
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#define regXPB_CLG_CFG3 0x001f
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#define regXPB_CLG_CFG3_BASE_IDX 0
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#define regXPB_CLG_CFG4 0x0020
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#define regXPB_CLG_CFG4_BASE_IDX 0
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#define regXPB_CLG_CFG5 0x0021
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#define regXPB_CLG_CFG5_BASE_IDX 0
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#define regXPB_CLG_CFG6 0x0022
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#define regXPB_CLG_CFG6_BASE_IDX 0
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#define regXPB_CLG_CFG7 0x0023
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#define regXPB_CLG_CFG7_BASE_IDX 0
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#define regXPB_CLG_EXTRA0 0x0024
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#define regXPB_CLG_EXTRA0_BASE_IDX 0
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#define regXPB_CLG_EXTRA1 0x0025
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#define regXPB_CLG_EXTRA1_BASE_IDX 0
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#define regXPB_CLG_EXTRA_MSK 0x0026
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#define regXPB_CLG_EXTRA_MSK_BASE_IDX 0
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#define regXPB_LB_ADDR 0x0027
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#define regXPB_LB_ADDR_BASE_IDX 0
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#define regXPB_HST_CFG 0x0028
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#define regXPB_HST_CFG_BASE_IDX 0
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#define regXPB_P2P_BAR_CFG 0x0029
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#define regXPB_P2P_BAR_CFG_BASE_IDX 0
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#define regXPB_P2P_BAR0 0x002a
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#define regXPB_P2P_BAR0_BASE_IDX 0
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#define regXPB_P2P_BAR1 0x002b
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#define regXPB_P2P_BAR1_BASE_IDX 0
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#define regXPB_P2P_BAR2 0x002c
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#define regXPB_P2P_BAR2_BASE_IDX 0
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#define regXPB_P2P_BAR3 0x002d
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#define regXPB_P2P_BAR3_BASE_IDX 0
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#define regXPB_P2P_BAR4 0x002e
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#define regXPB_P2P_BAR4_BASE_IDX 0
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#define regXPB_P2P_BAR5 0x002f
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#define regXPB_P2P_BAR5_BASE_IDX 0
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#define regXPB_P2P_BAR6 0x0030
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#define regXPB_P2P_BAR6_BASE_IDX 0
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#define regXPB_P2P_BAR7 0x0031
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#define regXPB_P2P_BAR7_BASE_IDX 0
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#define regXPB_P2P_BAR_SETUP 0x0032
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#define regXPB_P2P_BAR_SETUP_BASE_IDX 0
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#define regXPB_P2P_BAR_DELTA_ABOVE 0x0034
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#define regXPB_P2P_BAR_DELTA_ABOVE_BASE_IDX 0
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#define regXPB_P2P_BAR_DELTA_BELOW 0x0035
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#define regXPB_P2P_BAR_DELTA_BELOW_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR0 0x0036
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#define regXPB_PEER_SYS_BAR0_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR1 0x0037
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#define regXPB_PEER_SYS_BAR1_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR2 0x0038
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#define regXPB_PEER_SYS_BAR2_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR3 0x0039
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#define regXPB_PEER_SYS_BAR3_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR4 0x003a
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#define regXPB_PEER_SYS_BAR4_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR5 0x003b
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#define regXPB_PEER_SYS_BAR5_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR6 0x003c
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#define regXPB_PEER_SYS_BAR6_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR7 0x003d
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#define regXPB_PEER_SYS_BAR7_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR8 0x003e
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#define regXPB_PEER_SYS_BAR8_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR9 0x003f
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#define regXPB_PEER_SYS_BAR9_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR10 0x0040
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#define regXPB_PEER_SYS_BAR10_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR11 0x0041
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#define regXPB_PEER_SYS_BAR11_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR12 0x0042
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#define regXPB_PEER_SYS_BAR12_BASE_IDX 0
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#define regXPB_PEER_SYS_BAR13 0x0043
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#define regXPB_PEER_SYS_BAR13_BASE_IDX 0
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#define regXPB_CLK_GAT 0x0044
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#define regXPB_CLK_GAT_BASE_IDX 0
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#define regXPB_INTF_CFG 0x0045
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#define regXPB_INTF_CFG_BASE_IDX 0
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#define regXPB_INTF_STS 0x0046
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#define regXPB_INTF_STS_BASE_IDX 0
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#define regXPB_PIPE_STS 0x0047
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#define regXPB_PIPE_STS_BASE_IDX 0
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#define regXPB_WCB_STS 0x0048
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#define regXPB_WCB_STS_BASE_IDX 0
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#define regXPB_MAP_INVERT_FLUSH_NUM_LSB 0x0049
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#define regXPB_MAP_INVERT_FLUSH_NUM_LSB_BASE_IDX 0
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#define regXPB_STICKY 0x004a
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#define regXPB_STICKY_BASE_IDX 0
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#define regXPB_STICKY_W1C 0x004b
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#define regXPB_STICKY_W1C_BASE_IDX 0
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#define regXPB_SUB_CTRL 0x004c
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#define regXPB_SUB_CTRL_BASE_IDX 0
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#define regXPB_PERF_KNOBS 0x004d
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#define regXPB_PERF_KNOBS_BASE_IDX 0
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#define regXPB_MISC_CFG 0x004e
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#define regXPB_MISC_CFG_BASE_IDX 0
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#define regXPB_INTF_CFG2 0x004f
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#define regXPB_INTF_CFG2_BASE_IDX 0
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#define regXPB_CLG_EXTRA_RD 0x0050
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#define regXPB_CLG_EXTRA_RD_BASE_IDX 0
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#define regXPB_CLG_EXTRA_MSK_RD 0x0051
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#define regXPB_CLG_EXTRA_MSK_RD_BASE_IDX 0
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#define regXPB_CLG_GFX_MATCH 0x0052
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#define regXPB_CLG_GFX_MATCH_BASE_IDX 0
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#define regXPB_CLG_GFX_MATCH_VLD 0x0053
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#define regXPB_CLG_GFX_MATCH_VLD_BASE_IDX 0
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#define regXPB_CLG_GFX_MATCH_MSK 0x0054
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#define regXPB_CLG_GFX_MATCH_MSK_BASE_IDX 0
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#define regXPB_CLG_MM_MATCH 0x0055
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#define regXPB_CLG_MM_MATCH_BASE_IDX 0
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#define regXPB_CLG_MM_MATCH_VLD 0x0056
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#define regXPB_CLG_MM_MATCH_VLD_BASE_IDX 0
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#define regXPB_CLG_MM_MATCH_MSK 0x0057
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#define regXPB_CLG_MM_MATCH_MSK_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING0 0x005a
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#define regXPB_CLG_GFX_UNITID_MAPPING0_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING1 0x005b
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#define regXPB_CLG_GFX_UNITID_MAPPING1_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING2 0x005c
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#define regXPB_CLG_GFX_UNITID_MAPPING2_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING3 0x005d
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#define regXPB_CLG_GFX_UNITID_MAPPING3_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING4 0x005e
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#define regXPB_CLG_GFX_UNITID_MAPPING4_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING5 0x005f
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#define regXPB_CLG_GFX_UNITID_MAPPING5_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING6 0x0060
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#define regXPB_CLG_GFX_UNITID_MAPPING6_BASE_IDX 0
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#define regXPB_CLG_GFX_UNITID_MAPPING7 0x0061
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#define regXPB_CLG_GFX_UNITID_MAPPING7_BASE_IDX 0
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#define regXPB_CLG_MM_UNITID_MAPPING0 0x0062
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#define regXPB_CLG_MM_UNITID_MAPPING0_BASE_IDX 0
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#define regXPB_CLG_MM_UNITID_MAPPING1 0x0063
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#define regXPB_CLG_MM_UNITID_MAPPING1_BASE_IDX 0
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#define regXPB_CLG_MM_UNITID_MAPPING2 0x0064
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#define regXPB_CLG_MM_UNITID_MAPPING2_BASE_IDX 0
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#define regXPB_CLG_MM_UNITID_MAPPING3 0x0065
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#define regXPB_CLG_MM_UNITID_MAPPING3_BASE_IDX 0
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// addressBlock: athub_rpbdec
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// base address: 0x31d0
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#define regATHUB_SHARED_VIRT_RESET_REQ 0x0074
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#define regATHUB_SHARED_VIRT_RESET_REQ_BASE_IDX 0
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#define regATHUB_MEM_POWER_LS 0x007f
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#define regATHUB_MEM_POWER_LS_BASE_IDX 0
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#define regATHUB_MISC_CNTL 0x0080
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#define regATHUB_MISC_CNTL_BASE_IDX 0
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#define regRPB_PASSPW_CONF 0x0081
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#define regRPB_PASSPW_CONF_BASE_IDX 0
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#define regRPB_BLOCKLEVEL_CONF 0x0082
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#define regRPB_BLOCKLEVEL_CONF_BASE_IDX 0
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#define regRPB_TAG_CONF 0x0083
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#define regRPB_TAG_CONF_BASE_IDX 0
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#define regRPB_ARB_CNTL 0x0085
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#define regRPB_ARB_CNTL_BASE_IDX 0
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#define regRPB_ARB_CNTL2 0x0086
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#define regRPB_ARB_CNTL2_BASE_IDX 0
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#define regRPB_BIF_CNTL 0x0087
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#define regRPB_BIF_CNTL_BASE_IDX 0
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#define regRPB_BIF_CNTL2 0x0088
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#define regRPB_BIF_CNTL2_BASE_IDX 0
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#define regRPB_SDPPORT_CNTL 0x0089
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#define regRPB_SDPPORT_CNTL_BASE_IDX 0
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#define regRPB_NBIF_SDPPORT_CNTL 0x008a
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#define regRPB_NBIF_SDPPORT_CNTL_BASE_IDX 0
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#define regRPB_DEINTRLV_COMBINE_CNTL 0x008c
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#define regRPB_DEINTRLV_COMBINE_CNTL_BASE_IDX 0
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#define regRPB_VC_SWITCH_RDWR 0x008d
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#define regRPB_VC_SWITCH_RDWR_BASE_IDX 0
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#define regRPB_ATS_CNTL3 0x008e
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#define regRPB_ATS_CNTL3_BASE_IDX 0
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#define regRPB_DF_SDPPORT_CNTL 0x008f
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#define regRPB_DF_SDPPORT_CNTL_BASE_IDX 0
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#define regRPB_ATS_CNTL 0x0090
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#define regRPB_ATS_CNTL_BASE_IDX 0
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#define regRPB_ATS_CNTL2 0x0091
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#define regRPB_ATS_CNTL2_BASE_IDX 0
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#define regRPB_PERFCOUNTER0_CFG 0x0092
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#define regRPB_PERFCOUNTER0_CFG_BASE_IDX 0
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#define regRPB_PERFCOUNTER1_CFG 0x0093
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#define regRPB_PERFCOUNTER1_CFG_BASE_IDX 0
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#define regRPB_PERFCOUNTER2_CFG 0x0094
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#define regRPB_PERFCOUNTER2_CFG_BASE_IDX 0
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#define regRPB_PERFCOUNTER3_CFG 0x0095
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#define regRPB_PERFCOUNTER3_CFG_BASE_IDX 0
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#define regRPB_PERFCOUNTER_RSLT_CNTL 0x0096
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#define regRPB_PERFCOUNTER_RSLT_CNTL_BASE_IDX 0
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#define regRPB_PERF_COUNTER_CNTL 0x0097
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#define regRPB_PERF_COUNTER_CNTL_BASE_IDX 0
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#define regRPB_PERFCOUNTER_HI 0x0098
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#define regRPB_PERFCOUNTER_HI_BASE_IDX 0
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#define regRPB_PERFCOUNTER_LO 0x0099
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#define regRPB_PERFCOUNTER_LO_BASE_IDX 0
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#define regRPB_PERF_COUNTER_STATUS 0x009a
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#define regRPB_PERF_COUNTER_STATUS_BASE_IDX 0
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#endif
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