221 lines
5.6 KiB
C
221 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/soc/mediatek/mtk-cmdq.h>
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#include "mtk_disp_drv.h"
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#include "mtk_drm_crtc.h"
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#include "mtk_drm_ddp_comp.h"
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#include "mtk_drm_drv.h"
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#define DISP_CCORR_EN 0x0000
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#define CCORR_EN BIT(0)
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#define DISP_CCORR_CFG 0x0020
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#define CCORR_RELAY_MODE BIT(0)
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#define CCORR_ENGINE_EN BIT(1)
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#define CCORR_GAMMA_OFF BIT(2)
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#define CCORR_WGAMUT_SRC_CLIP BIT(3)
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#define DISP_CCORR_SIZE 0x0030
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#define DISP_CCORR_COEF_0 0x0080
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#define DISP_CCORR_COEF_1 0x0084
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#define DISP_CCORR_COEF_2 0x0088
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#define DISP_CCORR_COEF_3 0x008C
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#define DISP_CCORR_COEF_4 0x0090
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struct mtk_disp_ccorr_data {
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u32 matrix_bits;
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};
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struct mtk_disp_ccorr {
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struct clk *clk;
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void __iomem *regs;
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struct cmdq_client_reg cmdq_reg;
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const struct mtk_disp_ccorr_data *data;
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};
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int mtk_ccorr_clk_enable(struct device *dev)
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{
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struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
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return clk_prepare_enable(ccorr->clk);
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}
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void mtk_ccorr_clk_disable(struct device *dev)
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{
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struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
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clk_disable_unprepare(ccorr->clk);
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}
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void mtk_ccorr_config(struct device *dev, unsigned int w,
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unsigned int h, unsigned int vrefresh,
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unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
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{
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struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
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mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs,
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DISP_CCORR_SIZE);
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mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs,
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DISP_CCORR_CFG);
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}
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void mtk_ccorr_start(struct device *dev)
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{
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struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
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writel(CCORR_EN, ccorr->regs + DISP_CCORR_EN);
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}
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void mtk_ccorr_stop(struct device *dev)
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{
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struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
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writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
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}
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/* Converts a DRM S31.32 value to the HW S1.n format. */
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static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n)
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{
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u16 r;
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/* Sign bit. */
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r = in & BIT_ULL(63) ? BIT(n + 1) : 0;
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if ((in & GENMASK_ULL(62, 33)) > 0) {
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/* identity value 0x100000000 -> 0x400(mt8183), */
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/* identity value 0x100000000 -> 0x800(mt8192), */
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/* if bigger this, set it to max 0x7ff. */
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r |= GENMASK(n, 0);
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} else {
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/* take the n+1 most important bits. */
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r |= (in >> (32 - n)) & GENMASK(n, 0);
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}
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return r;
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}
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void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
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{
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struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
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struct drm_property_blob *blob = state->ctm;
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struct drm_color_ctm *ctm;
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const u64 *input;
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uint16_t coeffs[9] = { 0 };
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int i;
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struct cmdq_pkt *cmdq_pkt = NULL;
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u32 matrix_bits = ccorr->data->matrix_bits;
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if (!blob)
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return;
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ctm = (struct drm_color_ctm *)blob->data;
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input = ctm->matrix;
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for (i = 0; i < ARRAY_SIZE(coeffs); i++)
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coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits);
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mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
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&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
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mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3],
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&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_1);
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mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5],
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&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_2);
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mtk_ddp_write(cmdq_pkt, coeffs[6] << 16 | coeffs[7],
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&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3);
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mtk_ddp_write(cmdq_pkt, coeffs[8] << 16,
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&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4);
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}
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static int mtk_disp_ccorr_bind(struct device *dev, struct device *master,
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void *data)
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{
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return 0;
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}
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static void mtk_disp_ccorr_unbind(struct device *dev, struct device *master,
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void *data)
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{
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}
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static const struct component_ops mtk_disp_ccorr_component_ops = {
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.bind = mtk_disp_ccorr_bind,
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.unbind = mtk_disp_ccorr_unbind,
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};
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static int mtk_disp_ccorr_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_disp_ccorr *priv;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(priv->clk)) {
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dev_err(dev, "failed to get ccorr clk\n");
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return PTR_ERR(priv->clk);
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}
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priv->regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->regs)) {
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dev_err(dev, "failed to ioremap ccorr\n");
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return PTR_ERR(priv->regs);
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}
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#if IS_REACHABLE(CONFIG_MTK_CMDQ)
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ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
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if (ret)
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dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
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#endif
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priv->data = of_device_get_match_data(dev);
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platform_set_drvdata(pdev, priv);
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ret = component_add(dev, &mtk_disp_ccorr_component_ops);
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if (ret)
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dev_err(dev, "Failed to add component: %d\n", ret);
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return ret;
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}
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static void mtk_disp_ccorr_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &mtk_disp_ccorr_component_ops);
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}
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static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
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.matrix_bits = 10,
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};
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static const struct mtk_disp_ccorr_data mt8192_ccorr_driver_data = {
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.matrix_bits = 11,
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};
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static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
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{ .compatible = "mediatek,mt8183-disp-ccorr",
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.data = &mt8183_ccorr_driver_data},
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{ .compatible = "mediatek,mt8192-disp-ccorr",
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.data = &mt8192_ccorr_driver_data},
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
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struct platform_driver mtk_disp_ccorr_driver = {
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.probe = mtk_disp_ccorr_probe,
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.remove_new = mtk_disp_ccorr_remove,
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.driver = {
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.name = "mediatek-disp-ccorr",
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.owner = THIS_MODULE,
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.of_match_table = mtk_disp_ccorr_driver_dt_match,
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},
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};
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