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c0f6f0c471
DE3.0 VI layers supports plane-global alpha channel. DE2.0 FCC block have GLOBAL_ALPHA register that can be used as alpha source for blender. Add alpha property to the DRM plane and connect it to the corresponding registers in the mixer. Do not add alpha property for V3s SOC that have DE2.0 and 2 VI planes. Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20210128113940.347013-3-r.stratiienko@gmail.com
72 lines
2.4 KiB
C
72 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
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*/
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#ifndef _SUN8I_VI_LAYER_H_
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#define _SUN8I_VI_LAYER_H_
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#include <drm/drm_plane.h>
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \
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((base) + 0x30 * (layer) + 0x0)
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#define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \
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((base) + 0x30 * (layer) + 0x4)
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#define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \
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((base) + 0x30 * (layer) + 0x8)
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#define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \
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((base) + 0x30 * (layer) + 0xc + 4 * (plane))
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#define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \
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((base) + 0x30 * (layer) + 0x18 + 4 * (plane))
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#define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \
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((base) + 0xe8)
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#define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \
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((base) + 0xf0)
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#define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \
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((base) + 0xf4)
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#define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \
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((base) + 0xf8)
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#define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \
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((base) + 0xfc)
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#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG \
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(0xAA000 + 0x90)
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#define SUN8I_MIXER_FCC_GLOBAL_ALPHA(x) ((x) << 24)
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#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK GENMASK(31, 24)
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN BIT(0)
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/* RGB mode should be set for RGB formats and cleared for YCbCr */
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE BIT(15)
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET 8
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK GENMASK(12, 8)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(x) ((x) << 24)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL ((0) << 1)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_LAYER ((1) << 1)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED ((2) << 1)
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#define SUN8I_MIXER_CHAN_VI_DS_N(x) ((x) << 16)
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#define SUN8I_MIXER_CHAN_VI_DS_M(x) ((x) << 0)
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struct sun8i_mixer;
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struct sun8i_vi_layer {
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struct drm_plane plane;
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struct sun8i_mixer *mixer;
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int channel;
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int overlay;
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};
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static inline struct sun8i_vi_layer *
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plane_to_sun8i_vi_layer(struct drm_plane *plane)
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{
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return container_of(plane, struct sun8i_vi_layer, plane);
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}
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struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
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struct sun8i_mixer *mixer,
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int index);
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#endif /* _SUN8I_VI_LAYER_H_ */
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