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40e49564e1
If some errors are detected at the same time as the access end interrupt, the access end interrupt was not cleared. Especially with DMA, because then the access end interrupt was never enabled and, thus, never cleared. Clear the interrupt register always when a command error occurs. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> [saito: rebase to v5.4] Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: rebase and extension of the commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20201117131337.35307-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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