mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-29 22:02:02 +00:00
694b5a5d31
One new platform gets added, the Realtek RTD1195, which is an older Cortex-a7 based relative of the RTD12xx chips that are already supported in arch/arm64. The platform may also be extended to support running 32-bit kernels on those 64-bit chips for memory-constrained machines. In the Renesas shmobile platform, we gain support for "RZ/G1H" or R8A7742, an eight-core chip based on Cortex-A15 and Cortex-A7 cores, originally released in 2016 as one of the last high-end 32-bit designs. There is ongoing cleanup for the integrator, tegra, imx, and omap2 platforms, with integrator getting very close to the goal of having zero code in arch/arm/, and omap2 moving more of the chip specifics from old board code into device tree files. The Versatile Express platform is made more modular, with built-in drivers now becoming loadable modules. This is part of a greater effort for the Android OS to have a common kernel binary for all platforms and any platform specific code in loadable modules. The PXA platform drops support for Compulab's pxa2xx boards that had rather unusual flash and PCI drivers but no known users remaining. All device drivers specific to those boards can now get removed as well. Across platforms, there is ongoing cleanup, with Geert and Rob revisiting some a lot of Kconfig options. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl7XvmAACgkQmmx57+YA GNk4vRAAs3TxlwLAUk5dknAi+UstlviNPG/ys6mViFuLqktPyhkA/v6nFOBI5Ldf 8xAsaSk3+oAX3Dd7aTaudl5WMFWFtzT5xA4gEI7CBZrBaAL0BVns1JfnVxpPRIcF B09Sb3wv7++E/+AxYcoVLWd5wkc9tlMesrIV5FPHHasOp3rRjVI0cExXnXzqJU8M TbwrWEOczZNVAm2q4Eh1ttbuSIvPd3s4NMnI755MRSQ7u/rYFSPf6Ay8/eFTqx1e 0SMWHRmrGeP6yhLy7+Li0x0jsK3ReZ9SkLXp3iEZ9huKbBTHIPBUeBB1RMnCYGe+ M2OL+9ySSe9UI9sjvsLGPDAnJaZI/UDUOVhatZCTvYB7CZY5nYNrYp+heYFONWm6 Up3e1t2iGPbgs8/1y78a9YPxAdsW0iavRtjVUYb+nwX+savYZgSBATA1pZqLc317 5FAGmTh//OLKYBSjfAxu9H8aInJPZA595lUiPHEQujzZH5Xz0QNtv4dapeNL2I4g LO20PMvuEgmwlwj/Npnwdl0UQK3ztoeR2upCrk91VwtNWGiOWTzCMT/OkYAAjKuo QYMGu3UvbbTCHPsIdrUz8gZ2T3VnJoeE3ldny2QbNAtVdpH/F8htJcilrBbyv1vI IKB1oogf5zfUwXVwZRxCfI9s5hELUlAKMGTtNcybzdsKpN5xtTo= =gzCp -----END PGP SIGNATURE----- Merge tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Arnd Bergmann: "One new platform gets added, the Realtek RTD1195, which is an older Cortex-a7 based relative of the RTD12xx chips that are already supported in arch/arm64. The platform may also be extended to support running 32-bit kernels on those 64-bit chips for memory-constrained machines. In the Renesas shmobile platform, we gain support for "RZ/G1H" or R8A7742, an eight-core chip based on Cortex-A15 and Cortex-A7 cores, originally released in 2016 as one of the last high-end 32-bit designs. There is ongoing cleanup for the integrator, tegra, imx, and omap2 platforms, with integrator getting very close to the goal of having zero code in arch/arm/, and omap2 moving more of the chip specifics from old board code into device tree files. The Versatile Express platform is made more modular, with built-in drivers now becoming loadable modules. This is part of a greater effort for the Android OS to have a common kernel binary for all platforms and any platform specific code in loadable modules. The PXA platform drops support for Compulab's pxa2xx boards that had rather unusual flash and PCI drivers but no known users remaining. All device drivers specific to those boards can now get removed as well. Across platforms, there is ongoing cleanup, with Geert and Rob revisiting some a lot of Kconfig options" * tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits) ARM: omap2: fix omap5_realtime_timer_init definition ARM: zynq: Don't select CONFIG_ICST ARM: OMAP2+: Fix regression for using local timer on non-SMP SoCs clk: versatile: Fix kconfig dependency on COMMON_CLK_VERSATILE ARM: davinci: fix build failure without I2C power: reset: vexpress: fix build issue power: vexpress: cleanup: use builtin_platform_driver power: vexpress: add suppress_bind_attrs to true Revert "ARM: vexpress: Don't select VEXPRESS_CONFIG" MAINTAINERS: pxa: remove Compulab arm/pxa support ARM: pxa: remove Compulab pxa2xx boards bus: arm-integrator-lm: Fix return value check in integrator_ap_lm_probe() soc: imx: move cpu code to drivers/soc/imx ARM: imx: move cpu definitions into a header ARM: imx: use device_initcall for imx_soc_device_init ARM: imx: pcm037: make pcm970_sja1000_platform_data static bus: ti-sysc: Timers no longer need legacy quirk handling ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter ARM: dts: Configure system timers for omap2 ARM: dts: Configure system timers for ti81xx ...
789 lines
19 KiB
Text
789 lines
19 KiB
Text
/*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/bus/ti-sysc.h>
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#include <dt-bindings/clock/dm814.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/dm814x.h>
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/ {
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compatible = "ti,dm814";
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interrupt-parent = <&intc>;
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#address-cells = <1>;
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#size-cells = <1>;
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chosen { };
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aliases {
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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usb0 = &usb0;
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usb1 = &usb1;
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phy0 = &usb0_phy;
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phy1 = &usb1_phy;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0>;
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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interrupts = <3>;
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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usb: usb@47400000 {
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compatible = "ti,am33xx-usb";
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reg = <0x47400000 0x1000>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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ti,hwmods = "usb_otg_hs";
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usb0_phy: usb-phy@47401300 {
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compatible = "ti,am335x-usb-phy";
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reg = <0x47401300 0x100>;
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reg-names = "phy";
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ti,ctrl_mod = <&usb_ctrl_mod>;
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#phy-cells = <0>;
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};
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usb0: usb@47401000 {
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compatible = "ti,musb-am33xx";
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reg = <0x47401400 0x400
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0x47401000 0x200>;
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reg-names = "mc", "control";
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interrupts = <18>;
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interrupt-names = "mc";
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dr_mode = "otg";
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mentor,multipoint = <1>;
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mentor,num-eps = <16>;
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mentor,ram-bits = <12>;
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mentor,power = <500>;
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phys = <&usb0_phy>;
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dmas = <&cppi41dma 0 0 &cppi41dma 1 0
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&cppi41dma 2 0 &cppi41dma 3 0
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&cppi41dma 4 0 &cppi41dma 5 0
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&cppi41dma 6 0 &cppi41dma 7 0
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&cppi41dma 8 0 &cppi41dma 9 0
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&cppi41dma 10 0 &cppi41dma 11 0
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&cppi41dma 12 0 &cppi41dma 13 0
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&cppi41dma 14 0 &cppi41dma 0 1
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&cppi41dma 1 1 &cppi41dma 2 1
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&cppi41dma 3 1 &cppi41dma 4 1
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&cppi41dma 5 1 &cppi41dma 6 1
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&cppi41dma 7 1 &cppi41dma 8 1
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&cppi41dma 9 1 &cppi41dma 10 1
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&cppi41dma 11 1 &cppi41dma 12 1
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&cppi41dma 13 1 &cppi41dma 14 1>;
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dma-names =
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"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
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"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
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"rx14", "rx15",
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"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
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"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
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"tx14", "tx15";
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};
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usb1: usb@47401800 {
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compatible = "ti,musb-am33xx";
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reg = <0x47401c00 0x400
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0x47401800 0x200>;
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reg-names = "mc", "control";
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interrupts = <19>;
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interrupt-names = "mc";
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dr_mode = "otg";
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mentor,multipoint = <1>;
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mentor,num-eps = <16>;
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mentor,ram-bits = <12>;
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mentor,power = <500>;
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phys = <&usb1_phy>;
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dmas = <&cppi41dma 15 0 &cppi41dma 16 0
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&cppi41dma 17 0 &cppi41dma 18 0
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&cppi41dma 19 0 &cppi41dma 20 0
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&cppi41dma 21 0 &cppi41dma 22 0
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&cppi41dma 23 0 &cppi41dma 24 0
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&cppi41dma 25 0 &cppi41dma 26 0
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&cppi41dma 27 0 &cppi41dma 28 0
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&cppi41dma 29 0 &cppi41dma 15 1
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&cppi41dma 16 1 &cppi41dma 17 1
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&cppi41dma 18 1 &cppi41dma 19 1
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&cppi41dma 20 1 &cppi41dma 21 1
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&cppi41dma 22 1 &cppi41dma 23 1
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&cppi41dma 24 1 &cppi41dma 25 1
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&cppi41dma 26 1 &cppi41dma 27 1
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&cppi41dma 28 1 &cppi41dma 29 1>;
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dma-names =
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"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
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"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
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"rx14", "rx15",
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"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
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"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
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"tx14", "tx15";
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};
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cppi41dma: dma-controller@47402000 {
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compatible = "ti,am3359-cppi41";
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reg = <0x47400000 0x1000
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0x47402000 0x1000
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0x47403000 0x1000
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0x47404000 0x4000>;
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reg-names = "glue", "controller", "scheduler", "queuemgr";
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interrupts = <17>;
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interrupt-names = "glue";
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#dma-cells = <2>;
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#dma-channels = <30>;
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#dma-requests = <256>;
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};
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};
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/*
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* See TRM "Table 1-317. L4LS Instance Summary" for hints.
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* It shows the module target agent registers though, so the
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* actual device is typically 0x1000 before the target agent
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* except in cases where the module is larger than 0x1000.
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*/
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l4ls: l4ls@48000000 {
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compatible = "ti,dm814-l4ls", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x48000000 0x2000000>;
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i2c1: i2c@28000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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reg = <0x28000 0x1000>;
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interrupts = <70>;
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};
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elm: elm@80000 {
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compatible = "ti,814-elm";
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ti,hwmods = "elm";
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reg = <0x80000 0x2000>;
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interrupts = <4>;
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};
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gpio1: gpio@32000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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ti,gpio-always-on;
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reg = <0x32000 0x2000>;
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interrupts = <96>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@4c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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ti,gpio-always-on;
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reg = <0x4c000 0x2000>;
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interrupts = <98>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@1ac000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
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ti,gpio-always-on;
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reg = <0x1ac000 0x2000>;
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interrupts = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@1ae000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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ti,gpio-always-on;
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reg = <0x1ae000 0x2000>;
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interrupts = <62>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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i2c2: i2c@2a000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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reg = <0x2a000 0x1000>;
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interrupts = <71>;
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};
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mcspi1: spi@30000 {
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compatible = "ti,omap4-mcspi";
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reg = <0x30000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <65>;
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ti,spi-num-cs = <4>;
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ti,hwmods = "mcspi1";
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dmas = <&edma 16 0 &edma 17 0
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&edma 18 0 &edma 19 0
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&edma 20 0 &edma 21 0
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&edma 22 0 &edma 23 0>;
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dma-names = "tx0", "rx0", "tx1", "rx1",
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"tx2", "rx2", "tx3", "rx3";
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};
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mcspi2: spi@1a0000 {
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compatible = "ti,omap4-mcspi";
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reg = <0x1a0000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <125>;
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ti,spi-num-cs = <4>;
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ti,hwmods = "mcspi2";
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dmas = <&edma 42 0 &edma 43 0
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&edma 44 0 &edma 45 0>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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};
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/* Board must configure dmas with edma_xbar for EDMA */
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mcspi3: spi@1a2000 {
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compatible = "ti,omap4-mcspi";
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reg = <0x1a2000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <126>;
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ti,spi-num-cs = <4>;
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ti,hwmods = "mcspi3";
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};
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mcspi4: spi@1a4000 {
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compatible = "ti,omap4-mcspi";
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reg = <0x1a4000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <127>;
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ti,spi-num-cs = <4>;
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ti,hwmods = "mcspi4";
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};
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timer1_target: target-module@2e000 {
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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reg = <0x2e000 0x4>,
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<0x2e010 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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clocks = <&timer1_fck>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x2e000 0x1000>;
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timer1: timer@0 {
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compatible = "ti,am335x-timer-1ms";
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reg = <0x0 0x400>;
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interrupts = <67>;
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ti,timer-alwon;
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clocks = <&timer1_fck>;
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clock-names = "fck";
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};
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};
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uart1: uart@20000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart1";
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reg = <0x20000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <72>;
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dmas = <&edma 26 0 &edma 27 0>;
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dma-names = "tx", "rx";
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};
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uart2: uart@22000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart2";
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reg = <0x22000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <73>;
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dmas = <&edma 28 0 &edma 29 0>;
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dma-names = "tx", "rx";
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};
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uart3: uart@24000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart3";
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reg = <0x24000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <74>;
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dmas = <&edma 30 0 &edma 31 0>;
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dma-names = "tx", "rx";
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};
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timer2_target: target-module@40000 {
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compatible = "ti,sysc-omap4-timer", "ti,sysc";
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reg = <0x40000 0x4>,
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<0x40010 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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clocks = <&timer2_fck>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x40000 0x1000>;
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timer2: timer@0 {
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compatible = "ti,dm814-timer";
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reg = <0 0x1000>;
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interrupts = <68>;
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clocks = <&timer2_fck>;
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|
clock-names = "fck";
|
|
};
|
|
};
|
|
|
|
timer3: timer@42000 {
|
|
compatible = "ti,dm814-timer";
|
|
reg = <0x42000 0x2000>;
|
|
interrupts = <69>;
|
|
ti,hwmods = "timer3";
|
|
};
|
|
|
|
mmc1: mmc@60000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
ti,hwmods = "mmc1";
|
|
dmas = <&edma 24 0
|
|
&edma 25 0>;
|
|
dma-names = "tx", "rx";
|
|
interrupts = <64>;
|
|
interrupt-parent = <&intc>;
|
|
reg = <0x60000 0x1000>;
|
|
};
|
|
|
|
rtc: rtc@c0000 {
|
|
compatible = "ti,am3352-rtc", "ti,da830-rtc";
|
|
reg = <0xc0000 0x1000>;
|
|
interrupts = <75 76>;
|
|
ti,hwmods = "rtc";
|
|
};
|
|
|
|
mmc2: mmc@1d8000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
ti,hwmods = "mmc2";
|
|
dmas = <&edma 2 0
|
|
&edma 3 0>;
|
|
dma-names = "tx", "rx";
|
|
interrupts = <28>;
|
|
interrupt-parent = <&intc>;
|
|
reg = <0x1d8000 0x1000>;
|
|
};
|
|
|
|
control: control@140000 {
|
|
compatible = "ti,dm814-scm", "simple-bus";
|
|
reg = <0x140000 0x20000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0x140000 0x20000>;
|
|
|
|
scm_conf: scm_conf@0 {
|
|
compatible = "syscon", "simple-bus";
|
|
reg = <0x0 0x800>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0 0x800>;
|
|
|
|
phy_gmii_sel: phy-gmii-sel {
|
|
compatible = "ti,dm814-phy-gmii-sel";
|
|
reg = <0x650 0x4>;
|
|
#phy-cells = <1>;
|
|
};
|
|
|
|
scm_clocks: clocks {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
scm_clockdomains: clockdomains {
|
|
};
|
|
};
|
|
|
|
usb_ctrl_mod: control@620 {
|
|
compatible = "ti,am335x-usb-ctrl-module";
|
|
reg = <0x620 0x10
|
|
0x648 0x4>;
|
|
reg-names = "phy_ctrl", "wakeup";
|
|
};
|
|
|
|
edma_xbar: dma-router@f90 {
|
|
compatible = "ti,am335x-edma-crossbar";
|
|
reg = <0xf90 0x40>;
|
|
#dma-cells = <3>;
|
|
dma-requests = <32>;
|
|
dma-masters = <&edma>;
|
|
};
|
|
|
|
/*
|
|
* Note that silicon revision 2.1 and older
|
|
* require input enabled (bit 18 set) for all
|
|
* 3.3V I/Os to avoid cumulative hardware damage.
|
|
* For more info, see errata advisory 2.1.87.
|
|
* We leave bit 18 out of function-mask and rely
|
|
* on the bootloader for it.
|
|
*/
|
|
pincntl: pinmux@800 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x800 0x438>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
#pinctrl-cells = <1>;
|
|
pinctrl-single,register-width = <32>;
|
|
pinctrl-single,function-mask = <0x307ff>;
|
|
};
|
|
|
|
usb1_phy: usb-phy@1b00 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x1b00 0x100>;
|
|
reg-names = "phy";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
#phy-cells = <0>;
|
|
};
|
|
};
|
|
|
|
prcm: prcm@180000 {
|
|
compatible = "ti,dm814-prcm", "simple-bus";
|
|
reg = <0x180000 0x2000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0x180000 0x2000>;
|
|
|
|
prcm_clocks: clocks {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
prcm_clockdomains: clockdomains {
|
|
};
|
|
};
|
|
|
|
/* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
|
|
pllss: pllss@1c5000 {
|
|
compatible = "ti,dm814-pllss", "simple-bus";
|
|
reg = <0x1c5000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0x1c5000 0x1000>;
|
|
|
|
pllss_clocks: clocks {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
pllss_clockdomains: clockdomains {
|
|
};
|
|
};
|
|
|
|
wdt1: wdt@1c7000 {
|
|
compatible = "ti,omap3-wdt";
|
|
ti,hwmods = "wd_timer";
|
|
reg = <0x1c7000 0x1000>;
|
|
interrupts = <91>;
|
|
};
|
|
};
|
|
|
|
intc: interrupt-controller@48200000 {
|
|
compatible = "ti,dm814-intc";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
reg = <0x48200000 0x1000>;
|
|
};
|
|
|
|
/* Board must configure evtmux with edma_xbar for EDMA */
|
|
mmc3: mmc@47810000 {
|
|
compatible = "ti,omap4-hsmmc";
|
|
ti,hwmods = "mmc3";
|
|
interrupts = <29>;
|
|
interrupt-parent = <&intc>;
|
|
reg = <0x47810000 0x1000>;
|
|
};
|
|
|
|
target-module@49000000 {
|
|
compatible = "ti,sysc-omap4", "ti,sysc";
|
|
reg = <0x49000000 0x4>;
|
|
reg-names = "rev";
|
|
clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0x49000000 0x10000>;
|
|
|
|
edma: dma@0 {
|
|
compatible = "ti,edma3-tpcc";
|
|
reg = <0 0x10000>;
|
|
reg-names = "edma3_cc";
|
|
interrupts = <12 13 14>;
|
|
interrupt-names = "edma3_ccint", "edma3_mperr",
|
|
"edma3_ccerrint";
|
|
dma-requests = <64>;
|
|
#dma-cells = <2>;
|
|
|
|
ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
|
|
<&edma_tptc2 3>, <&edma_tptc3 0>;
|
|
|
|
ti,edma-memcpy-channels = <20 21>;
|
|
};
|
|
};
|
|
|
|
target-module@49800000 {
|
|
compatible = "ti,sysc-omap4", "ti,sysc";
|
|
reg = <0x49800000 0x4>,
|
|
<0x49800010 0x4>;
|
|
reg-names = "rev", "sysc";
|
|
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
|
|
ti,sysc-midle = <SYSC_IDLE_FORCE>;
|
|
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
|
|
<SYSC_IDLE_SMART>;
|
|
clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0x49800000 0x100000>;
|
|
|
|
edma_tptc0: dma@0 {
|
|
compatible = "ti,edma3-tptc";
|
|
reg = <0 0x100000>;
|
|
interrupts = <112>;
|
|
interrupt-names = "edma3_tcerrint";
|
|
};
|
|
};
|
|
|
|
target-module@49900000 {
|
|
compatible = "ti,sysc-omap4", "ti,sysc";
|
|
reg = <0x49900000 0x4>,
|
|
<0x49900010 0x4>;
|
|
reg-names = "rev", "sysc";
|
|
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
|
|
ti,sysc-midle = <SYSC_IDLE_FORCE>;
|
|
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
|
|
<SYSC_IDLE_SMART>;
|
|
clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0x49900000 0x100000>;
|
|
|
|
edma_tptc1: dma@0 {
|
|
compatible = "ti,edma3-tptc";
|
|
reg = <0 0x100000>;
|
|
interrupts = <113>;
|
|
interrupt-names = "edma3_tcerrint";
|
|
};
|
|
};
|
|
|
|
target-module@49a00000 {
|
|
compatible = "ti,sysc-omap4", "ti,sysc";
|
|
reg = <0x49a00000 0x4>,
|
|
<0x49a00010 0x4>;
|
|
reg-names = "rev", "sysc";
|
|
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
|
|
ti,sysc-midle = <SYSC_IDLE_FORCE>;
|
|
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
|
|
<SYSC_IDLE_SMART>;
|
|
clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0x49a00000 0x100000>;
|
|
|
|
edma_tptc2: dma@0 {
|
|
compatible = "ti,edma3-tptc";
|
|
reg = <0 0x100000>;
|
|
interrupts = <114>;
|
|
interrupt-names = "edma3_tcerrint";
|
|
};
|
|
};
|
|
|
|
target-module@49b00000 {
|
|
compatible = "ti,sysc-omap4", "ti,sysc";
|
|
reg = <0x49b00000 0x4>,
|
|
<0x49b00010 0x4>;
|
|
reg-names = "rev", "sysc";
|
|
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
|
|
ti,sysc-midle = <SYSC_IDLE_FORCE>;
|
|
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
|
|
<SYSC_IDLE_SMART>;
|
|
clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0x49b00000 0x100000>;
|
|
|
|
edma_tptc3: dma@0 {
|
|
compatible = "ti,edma3-tptc";
|
|
reg = <0 0x100000>;
|
|
interrupts = <115>;
|
|
interrupt-names = "edma3_tcerrint";
|
|
};
|
|
};
|
|
|
|
/* See TRM "Table 1-318. L4HS Instance Summary" */
|
|
l4hs: l4hs@4a000000 {
|
|
compatible = "ti,dm814-l4hs", "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0x4a000000 0x1b4040>;
|
|
|
|
target-module@100000 {
|
|
compatible = "ti,sysc-omap4-simple", "ti,sysc";
|
|
reg = <0x100900 0x4>,
|
|
<0x100908 0x4>,
|
|
<0x100904 0x4>;
|
|
reg-names = "rev", "sysc", "syss";
|
|
ti,sysc-mask = <0>;
|
|
ti,sysc-midle = <SYSC_IDLE_FORCE>,
|
|
<SYSC_IDLE_NO>;
|
|
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
|
|
<SYSC_IDLE_NO>;
|
|
ti,syss-mask = <1>;
|
|
clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0x100000 0x8000>;
|
|
|
|
mac: ethernet@0 {
|
|
compatible = "ti,cpsw";
|
|
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
|
|
clock-names = "fck", "cpts";
|
|
cpdma_channels = <8>;
|
|
ale_entries = <1024>;
|
|
bd_ram_size = <0x2000>;
|
|
mac_control = <0x20>;
|
|
slaves = <2>;
|
|
active_slave = <0>;
|
|
cpts_clock_mult = <0x80000000>;
|
|
cpts_clock_shift = <29>;
|
|
reg = <0 0x800>,
|
|
<0x900 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
/*
|
|
* c0_rx_thresh_pend
|
|
* c0_rx_pend
|
|
* c0_tx_pend
|
|
* c0_misc_pend
|
|
*/
|
|
interrupts = <40 41 42 43>;
|
|
ranges = <0 0 0x8000>;
|
|
syscon = <&scm_conf>;
|
|
|
|
davinci_mdio: mdio@800 {
|
|
compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
|
|
clocks = <&cpsw_125mhz_gclk>;
|
|
clock-names = "fck";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
bus_freq = <1000000>;
|
|
reg = <0x800 0x100>;
|
|
};
|
|
|
|
cpsw_emac0: slave@200 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
phys = <&phy_gmii_sel 1>;
|
|
};
|
|
|
|
cpsw_emac1: slave@300 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
phys = <&phy_gmii_sel 2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
gpmc: gpmc@50000000 {
|
|
compatible = "ti,am3352-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
ti,no-idle-on-init;
|
|
reg = <0x50000000 0x2000>;
|
|
interrupts = <100>;
|
|
gpmc,num-cs = <7>;
|
|
gpmc,num-waitpins = <2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
#include "dm814x-clocks.dtsi"
|
|
|
|
/* Preferred always-on timer for clocksource */
|
|
&timer1_target {
|
|
ti,no-reset-on-init;
|
|
ti,no-idle;
|
|
timer@0 {
|
|
assigned-clocks = <&timer1_fck>;
|
|
assigned-clock-parents = <&devosc_ck>;
|
|
};
|
|
};
|
|
|
|
/* Preferred timer for clockevent */
|
|
&timer2_target {
|
|
ti,no-reset-on-init;
|
|
ti,no-idle;
|
|
timer@0 {
|
|
assigned-clocks = <&timer2_fck>;
|
|
assigned-clock-parents = <&devosc_ck>;
|
|
};
|
|
};
|