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![Per Forlin](/assets/img/avatar_default.png)
Documentation about the background and the design of mmc non-blocking. Host driver guidelines to minimize request preparation overhead. Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Chris Ball <cjb@laptop.org>
87 lines
3.8 KiB
Text
87 lines
3.8 KiB
Text
Rationale
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=========
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How significant is the cache maintenance overhead?
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It depends. Fast eMMC and multiple cache levels with speculative cache
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pre-fetch makes the cache overhead relatively significant. If the DMA
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preparations for the next request are done in parallel with the current
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transfer, the DMA preparation overhead would not affect the MMC performance.
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The intention of non-blocking (asynchronous) MMC requests is to minimize the
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time between when an MMC request ends and another MMC request begins.
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Using mmc_wait_for_req(), the MMC controller is idle while dma_map_sg and
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dma_unmap_sg are processing. Using non-blocking MMC requests makes it
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possible to prepare the caches for next job in parallel with an active
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MMC request.
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MMC block driver
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================
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The mmc_blk_issue_rw_rq() in the MMC block driver is made non-blocking.
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The increase in throughput is proportional to the time it takes to
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prepare (major part of preparations are dma_map_sg() and dma_unmap_sg())
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a request and how fast the memory is. The faster the MMC/SD is the
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more significant the prepare request time becomes. Roughly the expected
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performance gain is 5% for large writes and 10% on large reads on a L2 cache
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platform. In power save mode, when clocks run on a lower frequency, the DMA
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preparation may cost even more. As long as these slower preparations are run
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in parallel with the transfer performance won't be affected.
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Details on measurements from IOZone and mmc_test
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================================================
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https://wiki.linaro.org/WorkingGroups/Kernel/Specs/StoragePerfMMC-async-req
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MMC core API extension
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======================
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There is one new public function mmc_start_req().
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It starts a new MMC command request for a host. The function isn't
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truly non-blocking. If there is an ongoing async request it waits
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for completion of that request and starts the new one and returns. It
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doesn't wait for the new request to complete. If there is no ongoing
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request it starts the new request and returns immediately.
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MMC host extensions
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===================
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There are two optional members in the mmc_host_ops -- pre_req() and
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post_req() -- that the host driver may implement in order to move work
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to before and after the actual mmc_host_ops.request() function is called.
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In the DMA case pre_req() may do dma_map_sg() and prepare the DMA
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descriptor, and post_req() runs the dma_unmap_sg().
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Optimize for the first request
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==============================
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The first request in a series of requests can't be prepared in parallel
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with the previous transfer, since there is no previous request.
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The argument is_first_req in pre_req() indicates that there is no previous
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request. The host driver may optimize for this scenario to minimize
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the performance loss. A way to optimize for this is to split the current
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request in two chunks, prepare the first chunk and start the request,
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and finally prepare the second chunk and start the transfer.
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Pseudocode to handle is_first_req scenario with minimal prepare overhead:
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if (is_first_req && req->size > threshold)
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/* start MMC transfer for the complete transfer size */
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mmc_start_command(MMC_CMD_TRANSFER_FULL_SIZE);
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/*
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* Begin to prepare DMA while cmd is being processed by MMC.
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* The first chunk of the request should take the same time
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* to prepare as the "MMC process command time".
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* If prepare time exceeds MMC cmd time
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* the transfer is delayed, guesstimate max 4k as first chunk size.
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*/
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prepare_1st_chunk_for_dma(req);
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/* flush pending desc to the DMAC (dmaengine.h) */
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dma_issue_pending(req->dma_desc);
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prepare_2nd_chunk_for_dma(req);
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/*
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* The second issue_pending should be called before MMC runs out
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* of the first chunk. If the MMC runs out of the first data chunk
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* before this call, the transfer is delayed.
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*/
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dma_issue_pending(req->dma_desc);
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