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5d27a9c8ea
When porting (Q)SPI controller drivers from the MTD layer to the SPI layer, the naming scheme for the memory devices changes. To be able to keep compatibility with the old drivers naming scheme, a name field is added to struct spi_mem and a hook is added to let controller drivers set a custom name for the memory device. Example for the FSL QSPI driver: Name with the old driver: 21e0000.qspi, or with multiple devices: 21e0000.qspi-0, 21e0000.qspi-1, ... Name with the new driver without spi_mem_get_name: spi4.0 Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
438 lines
12 KiB
C
438 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Exceet Electronics GmbH
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* Copyright (C) 2018 Bootlin
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*
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* Author: Boris Brezillon <boris.brezillon@bootlin.com>
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*/
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#include <linux/dmaengine.h>
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#include <linux/pm_runtime.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi-mem.h>
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#include "internals.h"
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/**
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* spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
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* memory operation
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* @ctlr: the SPI controller requesting this dma_map()
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* @op: the memory operation containing the buffer to map
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* @sgt: a pointer to a non-initialized sg_table that will be filled by this
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* function
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*
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* Some controllers might want to do DMA on the data buffer embedded in @op.
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* This helper prepares everything for you and provides a ready-to-use
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* sg_table. This function is not intended to be called from spi drivers.
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* Only SPI controller drivers should use it.
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* Note that the caller must ensure the memory region pointed by
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* op->data.buf.{in,out} is DMA-able before calling this function.
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
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const struct spi_mem_op *op,
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struct sg_table *sgt)
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{
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struct device *dmadev;
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if (!op->data.nbytes)
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return -EINVAL;
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if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
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dmadev = ctlr->dma_tx->device->dev;
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else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
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dmadev = ctlr->dma_rx->device->dev;
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else
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dmadev = ctlr->dev.parent;
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if (!dmadev)
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return -EINVAL;
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return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
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op->data.dir == SPI_MEM_DATA_IN ?
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DMA_FROM_DEVICE : DMA_TO_DEVICE);
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}
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EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
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/**
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* spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
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* memory operation
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* @ctlr: the SPI controller requesting this dma_unmap()
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* @op: the memory operation containing the buffer to unmap
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* @sgt: a pointer to an sg_table previously initialized by
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* spi_controller_dma_map_mem_op_data()
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*
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* Some controllers might want to do DMA on the data buffer embedded in @op.
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* This helper prepares things so that the CPU can access the
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* op->data.buf.{in,out} buffer again.
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*
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* This function is not intended to be called from SPI drivers. Only SPI
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* controller drivers should use it.
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*
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* This function should be called after the DMA operation has finished and is
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* only valid if the previous spi_controller_dma_map_mem_op_data() call
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* returned 0.
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
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const struct spi_mem_op *op,
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struct sg_table *sgt)
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{
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struct device *dmadev;
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if (!op->data.nbytes)
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return;
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if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
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dmadev = ctlr->dma_tx->device->dev;
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else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
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dmadev = ctlr->dma_rx->device->dev;
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else
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dmadev = ctlr->dev.parent;
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spi_unmap_buf(ctlr, dmadev, sgt,
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op->data.dir == SPI_MEM_DATA_IN ?
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DMA_FROM_DEVICE : DMA_TO_DEVICE);
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}
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EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
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static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
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{
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u32 mode = mem->spi->mode;
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switch (buswidth) {
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case 1:
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return 0;
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case 2:
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if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
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(!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
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return 0;
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break;
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case 4:
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if ((tx && (mode & SPI_TX_QUAD)) ||
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(!tx && (mode & SPI_RX_QUAD)))
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return 0;
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break;
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default:
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break;
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}
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return -ENOTSUPP;
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}
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static bool spi_mem_default_supports_op(struct spi_mem *mem,
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const struct spi_mem_op *op)
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{
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if (spi_check_buswidth_req(mem, op->cmd.buswidth, true))
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return false;
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if (op->addr.nbytes &&
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spi_check_buswidth_req(mem, op->addr.buswidth, true))
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return false;
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if (op->dummy.nbytes &&
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spi_check_buswidth_req(mem, op->dummy.buswidth, true))
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return false;
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if (op->data.nbytes &&
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spi_check_buswidth_req(mem, op->data.buswidth,
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op->data.dir == SPI_MEM_DATA_OUT))
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return false;
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return true;
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}
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EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
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/**
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* spi_mem_supports_op() - Check if a memory device and the controller it is
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* connected to support a specific memory operation
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* @mem: the SPI memory
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* @op: the memory operation to check
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*
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* Some controllers are only supporting Single or Dual IOs, others might only
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* support specific opcodes, or it can even be that the controller and device
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* both support Quad IOs but the hardware prevents you from using it because
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* only 2 IO lines are connected.
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*
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* This function checks whether a specific operation is supported.
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*
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* Return: true if @op is supported, false otherwise.
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*/
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bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
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{
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struct spi_controller *ctlr = mem->spi->controller;
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if (ctlr->mem_ops && ctlr->mem_ops->supports_op)
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return ctlr->mem_ops->supports_op(mem, op);
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return spi_mem_default_supports_op(mem, op);
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}
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EXPORT_SYMBOL_GPL(spi_mem_supports_op);
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/**
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* spi_mem_exec_op() - Execute a memory operation
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* @mem: the SPI memory
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* @op: the memory operation to execute
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*
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* Executes a memory operation.
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*
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* This function first checks that @op is supported and then tries to execute
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* it.
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*
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* Return: 0 in case of success, a negative error code otherwise.
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*/
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int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
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{
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unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
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struct spi_controller *ctlr = mem->spi->controller;
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struct spi_transfer xfers[4] = { };
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struct spi_message msg;
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u8 *tmpbuf;
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int ret;
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if (!spi_mem_supports_op(mem, op))
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return -ENOTSUPP;
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if (ctlr->mem_ops) {
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/*
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* Flush the message queue before executing our SPI memory
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* operation to prevent preemption of regular SPI transfers.
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*/
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spi_flush_queue(ctlr);
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if (ctlr->auto_runtime_pm) {
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ret = pm_runtime_get_sync(ctlr->dev.parent);
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if (ret < 0) {
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dev_err(&ctlr->dev,
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"Failed to power device: %d\n",
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ret);
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return ret;
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}
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}
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mutex_lock(&ctlr->bus_lock_mutex);
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mutex_lock(&ctlr->io_mutex);
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ret = ctlr->mem_ops->exec_op(mem, op);
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mutex_unlock(&ctlr->io_mutex);
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mutex_unlock(&ctlr->bus_lock_mutex);
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if (ctlr->auto_runtime_pm)
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pm_runtime_put(ctlr->dev.parent);
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/*
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* Some controllers only optimize specific paths (typically the
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* read path) and expect the core to use the regular SPI
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* interface in other cases.
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*/
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if (!ret || ret != -ENOTSUPP)
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return ret;
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}
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tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
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op->dummy.nbytes;
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/*
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* Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
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* we're guaranteed that this buffer is DMA-able, as required by the
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* SPI layer.
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*/
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tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
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if (!tmpbuf)
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return -ENOMEM;
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spi_message_init(&msg);
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tmpbuf[0] = op->cmd.opcode;
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xfers[xferpos].tx_buf = tmpbuf;
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xfers[xferpos].len = sizeof(op->cmd.opcode);
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xfers[xferpos].tx_nbits = op->cmd.buswidth;
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spi_message_add_tail(&xfers[xferpos], &msg);
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xferpos++;
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totalxferlen++;
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if (op->addr.nbytes) {
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int i;
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for (i = 0; i < op->addr.nbytes; i++)
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tmpbuf[i + 1] = op->addr.val >>
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(8 * (op->addr.nbytes - i - 1));
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xfers[xferpos].tx_buf = tmpbuf + 1;
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xfers[xferpos].len = op->addr.nbytes;
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xfers[xferpos].tx_nbits = op->addr.buswidth;
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spi_message_add_tail(&xfers[xferpos], &msg);
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xferpos++;
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totalxferlen += op->addr.nbytes;
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}
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if (op->dummy.nbytes) {
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memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
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xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
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xfers[xferpos].len = op->dummy.nbytes;
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xfers[xferpos].tx_nbits = op->dummy.buswidth;
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spi_message_add_tail(&xfers[xferpos], &msg);
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xferpos++;
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totalxferlen += op->dummy.nbytes;
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}
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if (op->data.nbytes) {
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if (op->data.dir == SPI_MEM_DATA_IN) {
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xfers[xferpos].rx_buf = op->data.buf.in;
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xfers[xferpos].rx_nbits = op->data.buswidth;
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} else {
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xfers[xferpos].tx_buf = op->data.buf.out;
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xfers[xferpos].tx_nbits = op->data.buswidth;
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}
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xfers[xferpos].len = op->data.nbytes;
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spi_message_add_tail(&xfers[xferpos], &msg);
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xferpos++;
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totalxferlen += op->data.nbytes;
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}
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ret = spi_sync(mem->spi, &msg);
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kfree(tmpbuf);
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if (ret)
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return ret;
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if (msg.actual_length != totalxferlen)
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return -EIO;
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_mem_exec_op);
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/**
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* spi_mem_get_name() - Return the SPI mem device name to be used by the
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* upper layer if necessary
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* @mem: the SPI memory
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*
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* This function allows SPI mem users to retrieve the SPI mem device name.
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* It is useful if the upper layer needs to expose a custom name for
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* compatibility reasons.
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*
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* Return: a string containing the name of the memory device to be used
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* by the SPI mem user
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*/
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const char *spi_mem_get_name(struct spi_mem *mem)
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{
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return mem->name;
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}
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EXPORT_SYMBOL_GPL(spi_mem_get_name);
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/**
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* spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
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* match controller limitations
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* @mem: the SPI memory
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* @op: the operation to adjust
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*
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* Some controllers have FIFO limitations and must split a data transfer
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* operation into multiple ones, others require a specific alignment for
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* optimized accesses. This function allows SPI mem drivers to split a single
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* operation into multiple sub-operations when required.
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*
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* Return: a negative error code if the controller can't properly adjust @op,
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* 0 otherwise. Note that @op->data.nbytes will be updated if @op
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* can't be handled in a single step.
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*/
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int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
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{
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struct spi_controller *ctlr = mem->spi->controller;
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if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size)
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return ctlr->mem_ops->adjust_op_size(mem, op);
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
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static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
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{
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return container_of(drv, struct spi_mem_driver, spidrv.driver);
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}
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static int spi_mem_probe(struct spi_device *spi)
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{
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struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
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struct spi_controller *ctlr = spi->controller;
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struct spi_mem *mem;
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mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
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if (!mem)
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return -ENOMEM;
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mem->spi = spi;
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if (ctlr->mem_ops && ctlr->mem_ops->get_name)
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mem->name = ctlr->mem_ops->get_name(mem);
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else
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mem->name = dev_name(&spi->dev);
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if (IS_ERR_OR_NULL(mem->name))
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return PTR_ERR(mem->name);
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spi_set_drvdata(spi, mem);
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return memdrv->probe(mem);
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}
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static int spi_mem_remove(struct spi_device *spi)
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{
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struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
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struct spi_mem *mem = spi_get_drvdata(spi);
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if (memdrv->remove)
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return memdrv->remove(mem);
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return 0;
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}
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static void spi_mem_shutdown(struct spi_device *spi)
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{
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struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
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struct spi_mem *mem = spi_get_drvdata(spi);
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if (memdrv->shutdown)
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memdrv->shutdown(mem);
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}
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/**
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* spi_mem_driver_register_with_owner() - Register a SPI memory driver
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* @memdrv: the SPI memory driver to register
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* @owner: the owner of this driver
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*
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* Registers a SPI memory driver.
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*
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* Return: 0 in case of success, a negative error core otherwise.
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*/
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int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
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struct module *owner)
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{
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memdrv->spidrv.probe = spi_mem_probe;
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memdrv->spidrv.remove = spi_mem_remove;
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memdrv->spidrv.shutdown = spi_mem_shutdown;
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return __spi_register_driver(owner, &memdrv->spidrv);
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}
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EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
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/**
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* spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
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* @memdrv: the SPI memory driver to unregister
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*
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* Unregisters a SPI memory driver.
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*/
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void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
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{
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spi_unregister_driver(&memdrv->spidrv);
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}
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EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
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