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The composite interface support the offset configuration, which is used to support mux and div in different registers. Because some sprd projects, the divider has different addresses from mux for one composite clk. Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com> Reviewed-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lore.kernel.org/r/20230913115211.11512-1-zhifeng.tang@unisoc.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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//
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// Spreadtrum divider clock driver
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//
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// Copyright (C) 2017 Spreadtrum, Inc.
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// Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
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#ifndef _SPRD_DIV_H_
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#define _SPRD_DIV_H_
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#include "common.h"
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/**
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* struct sprd_div_internal - Internal divider description
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* @shift: Bit offset of the divider in its register
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* @width: Width of the divider field in its register
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*
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* That structure represents a single divider, and is meant to be
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* embedded in other structures representing the various clock
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* classes.
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*/
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struct sprd_div_internal {
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s32 offset;
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u8 shift;
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u8 width;
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};
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#define _SPRD_DIV_CLK(_offset, _shift, _width) \
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{ \
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.offset = _offset, \
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.shift = _shift, \
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.width = _width, \
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}
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struct sprd_div {
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struct sprd_div_internal div;
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struct sprd_clk_common common;
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};
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#define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _offset, \
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_shift, _width, _flags, _fn) \
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struct sprd_div _struct = { \
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.div = _SPRD_DIV_CLK(_offset, _shift, _width), \
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.common = { \
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.regmap = NULL, \
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.reg = _reg, \
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.hw.init = _fn(_name, _parent, \
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&sprd_div_ops, _flags), \
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} \
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}
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#define SPRD_DIV_CLK(_struct, _name, _parent, _reg, \
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_shift, _width, _flags) \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, 0x0, \
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_shift, _width, _flags, CLK_HW_INIT)
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#define SPRD_DIV_CLK_FW_NAME(_struct, _name, _parent, _reg, \
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_shift, _width, _flags) \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, 0x0, \
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_shift, _width, _flags, CLK_HW_INIT_FW_NAME)
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#define SPRD_DIV_CLK_HW(_struct, _name, _parent, _reg, \
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_shift, _width, _flags) \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, 0x0, \
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_shift, _width, _flags, CLK_HW_INIT_HW)
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static inline struct sprd_div *hw_to_sprd_div(const struct clk_hw *hw)
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{
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struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
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return container_of(common, struct sprd_div, common);
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}
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unsigned long sprd_div_helper_recalc_rate(struct sprd_clk_common *common,
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const struct sprd_div_internal *div,
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unsigned long parent_rate);
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int sprd_div_helper_set_rate(const struct sprd_clk_common *common,
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const struct sprd_div_internal *div,
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unsigned long rate,
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unsigned long parent_rate);
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extern const struct clk_ops sprd_div_ops;
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#endif /* _SPRD_DIV_H_ */
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