Suman Anna 43570f78a2 arm64: dts: ti: k3-am65-base-board: Add IPC sub-mailbox nodes for R5Fs ... Add the sub-mailbox nodes that are used to communicate between MPU and the two R5F remote processors present in the MCU domain to the AM654 EVM base board. These sub-mailbox nodes utilize the System Mailbox clusters 0 and 1. The interrupts associated with the Mailbox Cluster User interrupt used by the sub-mailbox nodes are also added. The GIC_SPI interrupt to be used is dynamically allocated and managed by the System Firmware through the ti-sci-intr irqchip driver. All the remaining mailbox clusters are currently not used on A53 core, and so are disabled. The sub-mailbox nodes added match the hard-coded mailbox configuration used within the TI RTOS IPC software packages. The Cortex R5F processor sub-system is assumed to be running in Split mode, so a sub-mailbox node is used by each of the R5F cores. Only the sub-mailbox node from cluster 0 is used in case of Lockstep mode. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>		2019-10-18 12:16:03 +03:00
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dts	arm64: dts: ti: k3-am65-base-board: Add IPC sub-mailbox nodes for R5Fs	2019-10-18 12:16:03 +03:00
.gitignore
install.sh	arm64: kbuild: make "make install" not depend on vmlinux	2016-02-19 10:33:35 +00:00
Makefile	arm64: localise Image objcopy flags	2016-07-19 15:30:23 +01:00