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7232ab8b89
Implement the IOMMU performance monitor capability, which supports the collection of information about key events occurring during operation of the remapping hardware, to aid performance tuning and debug. The IOMMU perfmon support is implemented as part of the IOMMU driver and interfaces with the Linux perf subsystem. The IOMMU PMU has the following unique features compared with the other PMUs. - Support counting. Not support sampling. - Does not support per-thread counting. The scope is system-wide. - Support per-counter capability register. The event constraints can be enumerated. - The available event and event group can also be enumerated. - Extra Enhanced Commands are introduced to control the counters. Add a new variable, struct iommu_pmu *pmu, to in the struct intel_iommu to track the PMU related information. Add iommu_pmu_register() and iommu_pmu_unregister() to register and unregister a IOMMU PMU. The register function setup the IOMMU PMU ops and invoke the standard perf_pmu_register() interface to register a PMU in the perf subsystem. This patch only exposes the functions. The following patch will enable them in the IOMMU driver. The IOMMU PMUs can be found under /sys/bus/event_source/devices/dmar* The available filters and event format can be found at the format folder $ ls /sys/bus/event_source/devices/dmar1/format/ event event_group filter_ats filter_ats_en filter_page_table filter_page_table_en The supported events can be found at the events folder $ ls /sys/bus/event_source/devices/dmar1/events/ ats_blocked fs_nonleaf_hit int_cache_hit_posted iommu_mem_blocked iotlb_hit pasid_cache_lookup ss_nonleaf_hit ctxt_cache_hit fs_nonleaf_lookup int_cache_lookup iommu_mrds iotlb_lookup pg_req_posted ss_nonleaf_lookup ctxt_cache_lookup int_cache_hit_nonposted iommu_clocks iommu_requests pasid_cache_hit pw_occupancy The command below illustrates filter usage with a simple example. $ perf stat -e dmar1/iommu_requests,filter_ats_en=0x1,filter_ats=0x1/ -a sleep 1 Performance counter stats for 'system wide': 368,947 dmar1/iommu_requests,filter_ats_en=0x1,filter_ats=0x1/ 1.002592074 seconds time elapsed Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Link: https://lore.kernel.org/r/20230128200428.1459118-5-kan.liang@linux.intel.com Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* PERFCFGOFF_REG, PERFFRZOFF_REG
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* PERFOVFOFF_REG, PERFCNTROFF_REG
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*/
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#define IOMMU_PMU_NUM_OFF_REGS 4
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#define IOMMU_PMU_OFF_REGS_STEP 4
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#define IOMMU_PMU_FILTER_REQUESTER_ID 0x01
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#define IOMMU_PMU_FILTER_DOMAIN 0x02
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#define IOMMU_PMU_FILTER_PASID 0x04
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#define IOMMU_PMU_FILTER_ATS 0x08
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#define IOMMU_PMU_FILTER_PAGE_TABLE 0x10
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#define IOMMU_PMU_FILTER_EN BIT(31)
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#define IOMMU_PMU_CFG_OFFSET 0x100
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#define IOMMU_PMU_CFG_CNTRCAP_OFFSET 0x80
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#define IOMMU_PMU_CFG_CNTREVCAP_OFFSET 0x84
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#define IOMMU_PMU_CFG_SIZE 0x8
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#define IOMMU_PMU_CFG_FILTERS_OFFSET 0x4
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#define IOMMU_PMU_CAP_REGS_STEP 8
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#define iommu_cntrcap_pcc(p) ((p) & 0x1)
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#define iommu_cntrcap_cw(p) (((p) >> 8) & 0xff)
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#define iommu_cntrcap_ios(p) (((p) >> 16) & 0x1)
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#define iommu_cntrcap_egcnt(p) (((p) >> 28) & 0xf)
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#define IOMMU_EVENT_CFG_EGI_SHIFT 8
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#define IOMMU_EVENT_CFG_ES_SHIFT 32
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#define IOMMU_EVENT_CFG_INT BIT_ULL(1)
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#define iommu_event_select(p) ((p) & 0xfffffff)
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#define iommu_event_group(p) (((p) >> 28) & 0xf)
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#ifdef CONFIG_INTEL_IOMMU_PERF_EVENTS
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int alloc_iommu_pmu(struct intel_iommu *iommu);
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void free_iommu_pmu(struct intel_iommu *iommu);
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void iommu_pmu_register(struct intel_iommu *iommu);
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void iommu_pmu_unregister(struct intel_iommu *iommu);
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#else
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static inline int
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alloc_iommu_pmu(struct intel_iommu *iommu)
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{
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return 0;
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}
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static inline void
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free_iommu_pmu(struct intel_iommu *iommu)
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{
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}
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static inline void
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iommu_pmu_register(struct intel_iommu *iommu)
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{
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}
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static inline void
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iommu_pmu_unregister(struct intel_iommu *iommu)
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{
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}
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#endif /* CONFIG_INTEL_IOMMU_PERF_EVENTS */
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